 Capacitor constructions, DRAM constructions, and semiconductive material assemblies |
| In one aspect, the invention encompasses an etching process. A first material is provided over a ... |
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| Data storage device |
| Disclosed are electron emitters and data storage devices that include electron emitters. In one ... |
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| Method of storing a data bit including melting and cooling a volume of alloy therein |
| In the following detailed description of embodiments of the invention, reference is made to the ... |
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| Cavity spanning bottom electrode of a substrate-mounted bulk wave acoustic resonator |
| A filter is formed using robust and high Q acoustic resonators, where each resonator has its own ... |
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| Acoustic wave device and process for forming the same |
| OF THE DRAWINGS FIG. 1 illustrates schematically, in cross section, a portion of a microelectronic ... |
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| Method and apparatus for examining fiber material traveling in a fiber processing machine |
| 1. An apparatus for evaluating a fiber web running in a card, comprising: (a) a camera for scanning ... |
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| Optical memory medium and its information recording and erasing method and apparatus |
| An object of the present invention is to provide such an optical memory medium that it is heated ... |
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| Method and apparatus for improved energy readout |
| Accordingly, an object of the present invention is to provide systems that achieves better system DQ... |
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| Semiconductor integrated circuit device having dummy pattern effective against micro loading effect |
| It is therefore an important object of the present invention to provide a semiconductor integrated ... |
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| Logic cell having efficient optical proximity effect correction |
| OF THE INVENTION There will now be described embodiments of this invention with reference to the ... |
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Electrically programmable memory element with improved contacts
| Details |
Inventors: Lowrey, Tyler; Ovshinsky, Stanford R.; Wicker, Guy C.; Klersy, Patrick J.; Pashmakov, Boil; Czubatyj, Wolodymyr; Kostylev, Sergey A.;
Assignee: Ovonyx, Inc. (Rochester Hills, MI)
Primary Examiner: Cao; Phat X.
Assistant Examiner:
Attorney, Agent or Firm: Schlazer; Philip H., Siskind; Marvin S.
A memory element comprising a volume of phase change memory material; and first and second contact for supplying an electrical signal to the memory material, wherein the first contact comprises a conductive sidewall spacer. Alternately, the first contact may comprise a contact layer having an edge adjacent to the memory material. |
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DETAILED DESCRIPTION An object of the present invention is to provide a memory element having reduced programming energy.
Another object of the present invention is to provide a memory array having reduced cell area.
These and other objects of the invention are satisfied by an electrically programmable, single-cell memory element, comprising: a volume of phase-change memory material; and a first and a second contact for supplying an electrical signal to the memory material, the first contact comprising a conductive sidewall spacer.
These and other objects of the invention are satisfied by an electrically operated memory element, comprising: a volume of phase-change memory material; and a first and a second contact for supplying an electrical signal to the memory material, the first contact comprising a contact layer having an edge adjacent to the volume of memory material.
These and other objects of the invention are satisfied by a method of fabricating an electrically operated memory array having a cell area less than 8F2, the method comprising three or less masking steps in addition to the number of masking steps used for a CMOS process flow.
These and other objects of the invention are satisfied by a method of fabricating an electrically operated memory array having a cell area less than 6F2, the method comprising three or less masking steps in addition to the number of masking steps used for a CMOS process flow.
These and other objects of the invention are satisfied by a method of fabricating a non-charge-measurement, electrically operated memory array, comprising three or less masking steps in addition to the number of masking steps used for a CMOS process flow.
These and other objects of the invention are satisfied by a method of fabricating a non-charge-storage, electrically operated memory array, comprising three or less masking steps in addition to the number of masking steps used for a CMOS process flow.
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Active Solid-state 
