 Complementary junction heterostructure field-effect transistor |
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| Magnetic field sensor on elemental semiconductor substrate with electric field reduction means |
| It is, therefore, an object of this invention to provide a magnetic field sensor of an indium ... |
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| Method of preparing InSb thin film |
| An object of the present invention is to provide a method of preparing an InSb thin film, which can ... |
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| Organometallic fluorescent complex polymers for light emitting applications |
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| Method and apparatus for manufacturing semi-insulation GaAs monocrystal |
| Accordingly, it is the object of the present invention to provide a method of manufacturing a semi-... |
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| Semiconductor luminous element with light reflection and focusing configuration |
| OF THE INVENTION FIG. 1 (a) shows a cross section of semiconductor luminous element A, a surface-... |
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| Hydro-air renewable power system |
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| Electrodes comprising conductive perovskite-seed layers for perovskite dielectrics |
| As used herein, the term "high-dielectric-constant" means a dielectric constant greater than about 5... |
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| Nitride based semiconductor device and manufacture thereof |
| It is an object of the present invention to address the above problems and provide a nitride ... |
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| Evanescent scanning of biochemical array |
| OF THE INVENTION This invention provides apparatuses and methods for high-contrast scanning of (or ... |
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Manufacture of monolithic infrared focal plane arrays
| Details |
Inventors: Zanio, Ken; Bean, Ross C.;
Assignee: Ford Aerospace Corporation (Newport Beach, CA)
Primary Examiner: Larkins; William D.
Assistant Examiner: Monin, Jr.; Donald L.
Attorney, Agent or Firm: Weissenberger; Harry G., Radlo; Edward J., Zerschling; Keith L.
The manufacture of monolithic HgCdTe detectors and Si circuitry in an IR focal plane array is achieved by forming a protective layer of SiO.sub.2 or SiN.sub.x on a silicon wafer containing silicon circuits, etching steep-wall recesses into the wafer, selectively depositing epitaxial single-crystal layers of GaAs, CdTe, and HgCdTe in the recesses fabricating HgCdTe IR arrays, and depositing appropriate insulating and conductive interconnection patterns to interconnect the Si devices with one another and the HgCdTe devices with the Si devices. Little or no GaAs, CdTe, and HgCdTe grows on the SiO.sub.2 or SiN.sub.x outside the recesses. Since material grown outside the recess is polycrystalline, it is easily chemomechanically removed. |
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DETAILED DESCRIPTION We claim: 1.
A monolithic focal plane array structure including interconnected silicon circuitry and HgCdTe detectors, comprising: (a) a silicon substrate having silicon signal readout device circuitry formed therein; (b) said substrate having recesses formed therein, said recesses being filled with monocrystalline layers of GaAs, CdTe, and HgCdTe formed on top of one another, the surface of said HgCdTe layer being substantially level with the surface of said silicon substrate; and (c) patterns of insulating material and metallic interconnectors superimposed upon said substrate surface and said HgCdTe layer surface.
Description:
FIELD OF THE INVENTION This invention relates to the manufacture of HgCdTe focal plane arrays for infrared imaging systems, and more particularly to the technique of growing HgCdTe detectors on silicon substrates and interconnecting the detectors to silicon devices.
BACKGROUND OF THE INVENTION In the preparation HgCdTe photovoltaic focal plane arrays (FPAs) for infrared (IR) imaging, the detector arrays have conventionally been fabricated separately on a bulk single crystal CdTe substrate (16), which is then indium bump bonded in a hybrid fashion to the silicon wafer containing the processing circuitry.
The CdTe substrate is expensive and brittle, and frequently of poor quality.
For these reasons, sapphire, GaAs and Si substrates are in various stages of development to replace CdTe.
However, the silicon multiplexer must still be bump bonded to these substrates.
Such an interconnect is detrimental to the reliability, cost and flexibility of the system utilizing this IRFPA.
It is therefore desirable to produce silicon signal processing circuitry on a silicon wafer and to then grow HgCdTe IR detectors on the wafer and interconnect them with the silicon circuitry.
This procedure, however, presents several problems.
To begin with, it is not possible to directly grow detector quality HgCdTe on the surface of the silicon wafer.
An additional problem is the interconnection of elevated detector arrays with the silicon circuitry
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Active Solid-state 
