Method and apparatus for a semiconductor package for vertical surface mounting

DETAILED DESCRIPTION The present invention includes a method for packaging a semiconductor device comprising connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device.
The method further includes covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material.
Finally, the method includes removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion at a surface of the encapsulating material.
The present invention also includes a packaged semiconductor device comprising an integrated circuit device having a plurality of electrical connection pads and a plurality of wire leads coupled to the plurality of electrical connection pads.
The device includes a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end.
The present invention further includes a processed semiconductor wafer comprising a semiconductor wafer having first and second integrated circuit devices formed on a first surface of the wafer.
A plurality of wire leads is coupled between the first and second integrated circuit devices, and a covering of encapsulating material covers at least the first and second integrated circuit devices and the wire leads coupled between the first and second integrated circuit devices.