Transmit/receive compensation |
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Selective hemispherical grain silicon deposition |
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Tunable dielectric constant oxide and method of manufacture |
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Silicon-based functional matrix substrate and optical integrated oxide device |
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Photovoltaic device and process for producing the same |
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Floating gate transistor having buried strained silicon germanium channel layer |
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Method for forming gate |
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Method of packaging integrated circuits
| Details |
Inventors: Barber, Ivor G.;
Assignee: LSI Logic Corporation (Milpitas, CA)
Primary Examiner: Picardat; Kevin
Assistant Examiner:
Attorney, Agent or Firm: Luedeka, Neely & Graham P.C.
A method of assembling flip chips in a package. Solder bumps are attached to a first flip chip and to a second flip chip. A package substrate having first and second opposing sides is provided, and the first flip chip is electrically connected to the first side of the package substrate using the solder bumps attached to the first flip chip. The second flip chip is also electrically connected to the second side of the package substrate using the solder bumps attached to the second flip chip. The position of the second flip chip is substantially opposed to and aligned with the position of the first flip chip. The first and second flip chips are under filled with a heat conductive epoxy. The first flip chip is encapsulated against the first side of the package substrate, and the second flip chip is encapsulated against the second side of the package substrate. Solder balls are attached to the first side of the package insert. By attaching the flip chips to opposite sides of the package substrate, balancing the structure of the overall package, bending stress is reduced due to the flip chips having similar thermal coefficients of expansion. Additional benefits include improved electrical performance, reduced weight, and reduced size of the packaged circuit. |
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DETAILED DESCRIPTION The above and other objects are met by a method of assembling a flip chip in a package. Solder bumps are attached to a first flip chip and to a second flip chip. A package substrate having first and second opposing sides and electrical connections between the first and second sides, is provided, and the first flip chip is electrically connected to the first side of the package substrate using the solder bumps attached to the first flip chip. The second flip chip is also electrically connected to the second side of the package substrate using the solder bumps attached to the second flip chip. The position of the second flip chip is substantially opposed to and aligned with the position of the first flip chip. Several benefits are realized by attaching the integrated circuits to opposite sides of the package substrate. By balancing the structure of the overall package, bending stress is reduced. This is due to integrated circuits, having similar thermal coefficients of expansion, located on both sides of the package substrate, which reduces warping of the package substrate. Because warping is reduced, thinner package substrates may be used, allowing the overall package to be relatively smaller, lighter, and less expensive. In addition, by placing multiple integrated circuits on a package substrate, a higher package density is realized, reducing the number of packages required to hold a given number of integrated circuits. Further, by placing the integrated circuits in closer proximity one to another, the circuits are able to run at faster speeds. Preferably, the first and second flip chips are under filled with a heat conductive epoxy. The first flip chip is encapsulated against the first side of the package substrate, and the second flip chip is encapsulated against the second side of the package substrate. Also preferably, solder balls are attached to the first side of the package insert.
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