DETAILED DESCRIPTION The present invention relates to integrated circuit structures and fabrication methods.
BACKGROUND: SCALING A continuing trend in integrated circuit device technology, for a great many years, has been the steady shrinkage of device dimensions.
This shrinkage has preceded on a fairly steady exponential curve for many years.
The minimum patterned dimension is commonly referred to as the "critical dimension.
" With conventional MOS technology, as the critical dimension shrinks, the gate oxide becomes thinner, the diffusions become shallower, and the transistor minimum channel length becomes smaller.
Commonly the supply voltage is also reduced.
Further details regarding conventional scaling strategies can be found, for example, in Voorde, "MOSFET scaling into the future," Hewlett-Packard Journal, vol.
48, no.
4, pp.
96-100 (Aug.
1997), which is hereby incorporated by reference.
BACKGROUND: SHALLOW TRENCH ISOLATION A very popular isolation method in current semiconductor processing is shallow trench isolation.
One persistent problem which has been encountered is the edge effect at the top corners of the trenches.
If the oxide at the edges of the trenches is too thin, or if the boundary between the oxide and silicon forms too sharp a corner, the electrical field may create inversion so that a parasitic transistor exists.
This is especially a problem in circuits which operate with dual voltages and in embedded flash processes, since transistors can have different thicknesses of gate oxides.
In these processes, an extra HF etch can thin the oxide at the STI corner.
Many solutions to this problem are currently under study, as exemplified by the following articles, all of which are hereby incorporated by reference: Iwamoto et al.
, HIGHLY-RELIABLE ULTRA THIN GATE OXIDE FORMATION PROCESS, 1996 IEDM, p.
29.
7.
1-29.
7.
4; Kim et al.
, NITRIDE CLADDED POLY-SI SPACER Locos (NCPSL) ISOLATION TECHNOLOGY FOR THE 1 GIGA BIT DRAM, 1996 IEDM, p.
32.
2.
1-32.
2.
4; Chatterjee et al.
, A SHALLOW TRENCH ISOLATION USING LOCOS EDGE FOR PREVENTING CORNER EFFECTS FOR 0
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