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| Nitride semiconductor device |
| (1) A light emitting device according to the present invention is a type of nitride semiconductor ... |
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| EEPROM array using 2-bit non-volatile memory cells with serial read operations |
| FIG. 3 is a schematic diagram illustrating a memory block 100 in accordance with one embodiment of ... |
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| Semiconductor blocking layer for preventing UV radiation damage to MOS gate oxides |
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| UV-blocking layer for reducing UV-induced charging of SONOS dual-bit flash memory devices in BEOL |
| What is claimed is: 1. A SONOS flash memory device, comprising: a SONOS flash memory cell; and at ... |
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| Method for fabricating resistors within semiconductor integrated circuit devices |
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Utilizing atomic layer deposition for programmable device
| Details |
Inventors: Lowrey, Tyler A.; Dennison, Charles H.;
Assignee: Ovonyx, Inc (Boise, ID)
Primary Examiner: Thompson; Craig A.
Assistant Examiner: Vesperman; William
Attorney, Agent or Firm: Trop; Pruner & Hu; P.C.;;
In an aspect, an apparatus is provided that sets and reprograms the state of programmable devices. In an aspect, a method is provided such that an opening is formed through a dielectric exposing a contact, the contact formed on a substrate. An electrode is conformally deposited on a wall of the dielectric, utilizing atomic layer deposition (ALD). A programmable material is formed on the electrode and a conductor is formed to the programmable material. In an aspect, a barrier is conformally deposited utilizing ALD, between the electrode and the programmable material. |
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DETAILED DESCRIPTION Exemplary embodiments are described with reference to specific configurations.
Those of ordinary skill in the art will appreciate that various changes and modifications can be made while remaining within the scope of the appended claims.
Additionally, well-known elements, devices, components, circuits, process steps and the like are not set forth in detail in order to avoid obscuring the present invention.
A memory device utilizing programmable material to determine the state of memory elements of the device is described that reprograms to an amorphous and crystalline state.
The described memory device and method provides improved device reliability, improved programmable cycle life and decreased power consumption relative to previous devices.
Further, in an embodiment, the apparatus is manufacturable utilizing conventional process toolsets and facilities.
In an embodiment, atomic layer deposition (ALD) provides electrode device construction advantages, including reduction of required programming current for a reset, set and read operation in the memory device.
By utilizing ALD or atomic layer chemical vapor deposition (ALCVD) in place of chemical vapor deposition (CVD) techniques, electrode device construction advantages are provided, including the ability to deposit very thin and conformal films.
The film thickness is controlled by the number of applied deposition steps with a resolution defined by the thickness of one monolayer.
Further, ALD deposition provides large area film uniformity and accuracy.
FIG.
1 shows a schematic diagram of an embodiment of a memory array comprised of a plurality of memory elements presented and formed in the context of the description provided herein.
In this example, the circuit of memory array 5 includes an xy grid with memory elements 30 electrically interconnected in series with isolation devices 25 on a portion of a chip.
Address lines 10 (e.
g.
, columns) and 20 (e.
g.
, rows) are connected, in one embodiment, to external addressing circuitry in a conventional manner
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