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Audio Signal Processing

Binary-logic-level-electrical-detector-namely-to-prevent-the-detection-of-secret-codes-contained-in-a-memory-card

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Binary logic level electrical detector namely to prevent the detection of secret codes contained in a memory card

Details

Inventors: Kowalski, Jacek;
Assignee: SGS Thomson Microelectronics SA (Gentilly, FR)
Primary Examiner: Miller; Stanley D.
Assistant Examiner: Bertelson; David R.
Attorney, Agent or Firm: Plottel; Roland

To prevent fraudulent action by ill-intentioned users, the detection of the secret codes, contained in a memory card with MOS integrated circuit and transmitted to an input/output unit, is prevented. This is done by interposing a read amplifier in the transmission chain, in the integrated circuit itself. This read amplifier essentially has two parallel-connected identical circuits, designed to take complementary logic states when they receive one and the same logic level to be detected. The result of this is that the electrical comsumption of the amplifier is the same regardless of the logic level transmitted. Thus, it becomes impossible to deduce the nature of the logic level transmitted. As an improvement, the outputs of the detector are provided with bistable circuits which are coupled to each other so as to be capable of taking transitory or spurious information detected into account.

DETAILED DESCRIPTION The invention therefore concerns a binary logic level electrical detector of the biased type, comprising means to receive a signal with a given logic level and to deliver a signal with a logic level corresponding to the received logic level, said detector comprising means to make its consumption independent of the logic levels delivered.

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