Circuit for simulating vacuum tube compression in transistor amplifiers

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to the drawing, a circuit in accordance with the invention is shown in FIG.
1, referenced generally by the numeral 10.
The circuit includes input terminals, shown at A and B, for receiving a pair of driving signals.
As is known in the art, the input signals to a push-pull configuration, as is shown in FIG.
1 for transistors Q1 and Q2, are substantially identical, and of opposite phase.
A phase inverter, not shown, accordingly provides the two oppositely phased signals to inputs A and B of the circuit.
Circuit structure 10 includes a plurality of diodes, D1 through D13, resistors R1 through R11, and capacitors C1 through C4, connected as shown, for providing the input signals from inputs A and B to transistors Q1 and Q2.
A number of biasing voltages, V1, V2 and V3 are utilized in the structure, and an output transformer T combines the outputs of transistors Q1 and Q2 to provide the system output.
FIG.
2 shows an output waveform, obtained at secondary winding T2 of FIG.
1, in response to application of a high level input sinusoid at A and B.
The waveform of FIG.
2 includes characteristics similar to those obtained in a tube type power amplifier responding to high level sinusoidal inputs.
Specifically, some clipping is provided at the positive and negative peaks of the output signal, 12 and 14.
Further, at low values of the output signal, indicated by regions 16 in the vicinity of the zero crossings of the waveform, the output includes regions of reduced slope, simulating a soft cross-over typically provided by tube amplifiers.
Such soft cross-overs differ from the harsh, "dead-zone" cross-over provided by typical transistor amplifiers, in which the output waveform typically continues at its normal slope to the zero crossings, as shown in phantom at segments 18 and 20.
As is apparent from segments 18 and 20, in typical transistor amplifiers operating at Class AB, a certain dead-zone exists in the output, during times when the input signal is at a low positive or negative value less than the cut-in voltage of the transistors