Loudspeaker structure |
| I claim: 1. An electro acoustical transducer structure, comprising; (a) a base enclosure of ... |
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Stereo electroacoustical transducing |
| What is claimed is: 1. Stereo electroacoustical transducing apparatus comprising, dual-channel ... |
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Multiple chamber loudspeaker system |
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Speaker system |
| An object of the present invention is to provide a speaker system which can be installed in a ... |
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Electric acoustic converter |
| It is the object of the present invention to provide an electric acoustic converter generative of ... |
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Mid-range loudspeaker assembly propagating forward and backward sound waves in phase |
| Accordingly, it is an object of the present invention to provide a loudspeaker which reduces ... |
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Highly directional sound projector and receiver apparatus |
| We claim: 1. An acoustic apparatus equally suitable for use in both a sound projector mode and a ... |
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Subwoofer speaker system |
| The present invention includes the recognition of various problems found in previous designs. P... |
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Loudspeaker system and method for disbursing sounds waves |
| According to the apparatus and method of the present invention, a reflector screen is provided ... |
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Acoustic apparatus |
| Accordingly, a primary object of the present invention is to provide an acoustic apparatus with a ... |
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Polygraphic encryption-decryption communications system
| Details |
Inventors: Wilson, William J.;
Assignee:
Primary Examiner: Cangialosi; Salvatore
Assistant Examiner: Lewis; Aaron J.
Attorney, Agent or Firm: Phillips; C. A.
A public-key system for encoding, or encrypting, digital data wherein at least two singular matrices of binary bits provide separate encrypting factors. Each matrix is a product of a common singular matrix and a differing non-singular matrix. These encrypting matrices are loaded in separate memory formats. A Vernam or one-time key consisting of blocks or sets of randomly-generated binary bits are loaded into an input shift register, and the state of each stage is coupled as an enabling signal to gates which read out rows of each of the two stored matrices. Groups of outputs from gates serving each of the matrices are combined via column arranged, exclusively-OR gates fed, in parallel, to a shift register. The output of one shift register forms an encrypted decrypting signal. The output of the other shift register is exclusively-ORred in the manner of a one-time key with the binary encoded plaintext to be encrypted. As thus encrypted, it is transmitted with the decrypting signal to the addresses. There, the decrypting signal is transformed by appropriate private-key inverses of the invertible matrix component of the encrypting signal, and then, as modified, it is exclusively-ORred with the text encrypted signal whereby the text is decrypted. |
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DETAILED DESCRIPTION In accordance with this invention, an electronic memory is loaded with a binary matrix of "0" or "1" signal states, and the rows and columns of the matrix are made up so that the matrix is an invertible matrix. This thus loaded memory becomes an encryption (or decryption) instrument or key. Binary data to be encrypted is fed to a temporary or buffer input memory which holds a set of binary bits to be encrypted, this memory having an equivalent number of bit holding stages to the square, row or column, size of the binary matrix loaded memory. The bit state of each location of the input memory is employed as an enable circuit which, corresponding to a pre-selected state, a 0 or 1, causes the binary states of row loadings of the matrix memory to be read out. Outputs of column loadings of the matrix memory so read out are fed to discrete exclusively OR gates (there being one for each column) which have outputs connected to discretely ordered stages of a buffer output memory. Since only those rows which are subject to an enabling binary state from the input memory provide outputs to the exclusively OR gates, the output memory is encrypted by an input memory determined selection of a combination of binary states derived from the matrix. The now encoded contents of the output memory are serially read out and may then be transmitted over an insecure communications channel to a receiving point where the encoded binary bits would be decrypted. Decryption is accomplished in the same manner as encryption, with the exception that the decryption matrix is the inverse of the encryption matrix. It is to be appreciated that the "row" and "column" terms as used herein may be reversed. The foregoing describes basically a private-key system wherein it is necessary to keep secret both the encrypting and decrypting matrices. In the application of the present invention to public-key systems, the contents of one of two output memories would produce an encrypting signal in the classic manner of a one-time key rather than an encrypted signal
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