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Music speech filter |
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Compatible four channel FM system |
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Digital signal processor for adding harmonic content to digital audio signal |
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Method and device for preventing unauthorized access to a computer system |
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Sound field forming circuit and sound field forming apparatus |
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Minimal inductance electrodynamic transducer |
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Encryption apparatus |
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Data communications system using public key cryptography in a web environment |
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Speech encoding apparatus and related decoding apparatus |
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Signal processing system and method for digitally mixing a plurality of analog input signals
| Details |
Inventors: Fraisse, Christian;
Assignee: SGS-Thomson Microelectronics S.A. (Gentilly, FR)
Primary Examiner: Chin; Stephen
Assistant Examiner: Maddox; Michael W.
Attorney, Agent or Firm: Wolf, Greenfield & Sacks, P.C., Morris; James H., Galanthay; Theodore E.
A signal processing system receives and mixes a plurality of analog input signals having a maximum frequency. Each analog input signal is connected to an input of a modulator producing a high frequency oversampled digital signal. Each high frequency oversampled signal is connected to an input of a first decimation filter which produces an intermediate frequency oversampled multiple bit signal. Each of the intermediate frequency oversampled signals is connected to a respective input of a first digital mixer which produces a single mixed multiple bit output signal. The single mixed multiple bit output signal is connected to a second decimation filter which produces a final digital output signal, at a frequency suitable for representing the mixed analog input signals. |
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DETAILED DESCRIPTION In one illustrative embodiment of the invention, a signal processing system is provided, receiving a plurality of analog input signals having a maximum frequency and effecting mixing of the analog input signals. Each analog input signal is connected to an input of a modulator, producing a high frequency oversampled digital signal. Each high frequency oversampled signal is connected to an input of a first decimation filter which produces an intermediate frequency oversampled multiple bit signal. Each of the intermediate frequency oversampled signals is connected to a respective input of a first digital mixer, which produces a single mixed multiple bit output signal. Furthermore, the single mixed multiple bit output signal is connected to a second decimation filter which produces a final digital output signal, at a frequency suitable for representing the mixed analog input signals. In an embodiment of the invention, the signal processing system comprises a gain control circuit acting on each intermediate frequency oversampled signal between the first decimation filter and the first digital mixer. In an embodiment of the invention, each first decimation filter comprises a convolution circuit acting on the respective high frequency oversampled signal, and receiving a sequence of impulse response coefficients common to all convolution circuits. In an embodiment of the invention, the sequence of impulse response coefficients is stored in a common memory. In an embodiment of the invention, the convolution circuit produces the intermediate frequency oversampled signal by summing coefficients corresponding to 1's of the high frequency oversampled signal, and subtracting coefficients corresponding to 0's of the high frequency oversampled signal. In an embodiment of the invention, the signal processing system further comprises an interpolation filter connected to receive the final digital output signal and producing an interpolated signal; a second digital mixer receiving the interpolated signal, and at least one other digital signal, and producing an interpolated mixed digital signal; and a digital-to-analog converter receiving the interpolated mixed digital signal
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