Time variant analog signal switching apparatus including switching transient avoidance

DETAILED DESCRIPTION An objective of the subject invention is to avoid the generation of spurious voltage transients inherent in any operation which involves the switching of a time variant analog signal.
A further objective of the subject invention is to avoid the generation of spurious voltage transients inherent in the operation of switched gain control circuits.
The purpose of said gain control circuits is to affect gain changes to analog signals.
The reference in this specification to an analog signal(s) shall mean any analog signal which is time variant and cyclical in nature, periodically alternating in amplitude from zero to at least a nominal deviation from zero.
This definition shall include an alternating current signal in which the amplitude periodically alternates between positive and negative polarities passing through zero.
According to the subject invention a voltage transient avoidance apparatus comprises a detector that detects prescribed nominal deviations in amplitude from zero of an analog signal, a synchronizer that produces a switch state signal the value of which is set equal to the value of a discrete signal at times prescribed by said detector and a switch complex the state of which is prescribed by said switch state signal.
Further, according to the subject invention as applied to gain control, a gain control apparatus comprises the said voltage transient avoidance apparatus and a level adjuster that produces an output signal which is substantially equal to said analog signal except for the amplitude, which is adjusted as prescribed by state of said switch complex.
In accordance with a feature of the subject invention, the said detector may comprise a zero crossing detector.
A preferred embodiment of the zero crossing detector comprises a threshold detector that attains a first state when said analog signal is nominally positive in amplitude and attains a second state when said analog signal is nominally negative or zero in amplitude.
In accordance with another feature of the subject invention, the preferred embodiment of the said synchronizer comprises a first data register connected to a discrete signal source