Apparatus and method for product term allocation in programmable logic

DETAILED DESCRIPTION A programmable logic device having an allocation scheme for pooling product terms is described.
In the following description, for purposes of explanation, numerous specific details are set forth, such as the number of product terms assigned to a particular macrocell, control and clock signals, logic architecture, etc.
, in order to provide a thorough understanding of the present invention.
It will be obvious, however, to one skilled in the art that these specific details need not be used to practice the present invention.
In other instances, well-known structures and circuits have not been shown in detail in order to avoid unnecessarily obscurring the present invention.
FIG.
1 is a block diagram of the general architecture of a PLD.
The PLD is internally structured as a variation of the PLA architecture--an array of programmable AND gates 101 coupled to a fixed or allocatable array of OR gates 102.
PLDs make use of the fact that any logic equation can be converted to an equivalent sum-of-products (SOP) form.
Hence, logic equations can be implemented in an AND/OR architecture.
The basic PLA structure is augmented with input block 103 and output block 104.
Input block 103 is comprised of latches and various programmable input options, and output block 104 is comprised of output controls, registers, etc.
In addition, programmable feedback 105 allows a user to implement sequential logic functions as well as combination logic.
The number and location of the programmable connections between the AND and OR matrices, along with the input and output blocks, are predetermined by the architecture of the PLD.
The user specifies which of these connections are to remain open and which are to be closed, depending on the logic requirements.
The PLD is programmed accordingly.
Programmability of these connections can be achieved using various memory technologies such as fuses, EPROM cells, EEPROM cells, or static RAM cells.
Typically, a user purchases a PLD off-the-shelf and by using a development system running on a personal computer, can produce a customized integrated circuit