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Artificial random-number pattern generating circuit
| Details |
Inventors: Ohkubo, Chie; Hagihara, Yasuhiko;
Assignee: NEC Corporation (Tokyo, JP)
Primary Examiner: Nguyen; Long T.
Assistant Examiner:
Attorney, Agent or Firm: Whitham, Curtis & Whitham
An artificial random-number pattern generating circuit has a plurality of flip-flops each having a set signal input terminal and a clock signal input terminal; a plurality of selectors each of which forwards its output to the corresponding flip-flop and receives a first operation mode signal and/or a second operation mode signal; and an exclusive logical OR gate. The artificial random-number pattern generating circuit functions in three different ways, that is, as an artificial random-number pattern generator, a boundary scanning buffer or an input buffer, in accordance with the combinations of the first and second operation mode signals. The circuit can make not only a diagnosis of failure in the internal circuit of the large-scale integration (LSI) but also overall tests including those for input and output buffer circuits of the mounted LSI chip on a board or those for external wirings for the LSI. |
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DETAILED DESCRIPTION It is, therefore, an object of the invention to overcome the problems existing in the conventional generator and to provide an improved artificial random-number pattern generator.
It is another object of the invention to provide an artificial random-number pattern generator which is also capable of operating both as the boundary scanning buffer and the input or output buffer and which is realized by a simple repetition of the same basic circuits.
According to one aspect of the invention, there is provided an artificial random-number pattern generator which comprises: a plurality of N flip-flops, a first to N-th (N being an integer and N.
gtoreq.
2), each of which has an input terminal, a set signal input terminal and a clock signal input terminal; a plurality of (N-1) selectors, a first to (N-1)th, each of which receives an output of the (1+i)th (i being an integer and 1.
ltoreq.
i.
ltoreq.
(N-1)) flip-flop and an i-th input data and selectively forwards to the input terminal of the i-th flip-flop either one of the output of the (1+i)th flip-flop and the i-th input data or an exclusive logical OR thereof in accordance with a first operation mode signal and a second operation mode signal; an artificial random-number producing means which receives outputs from at least two of the N flip-flops, conducts a predetermined logical operation on the outputs, and outputs an artificial random-number data of 1 bit; and an N-th selector which receives the output data from the artificial random-number producing means, an external output data, and an N-th input data, and which selectively forwards to the input terminal of the N-th flip-flop either one of the external output data and the N-th input data or an exclusive logical OR of the output data from the artificial random-number producing means and the N-th input data in accordance with the first and second operation mode signals.
whereby the artificial random-number pattern generator operates as either one of an artificial random-number pattern generator, a boundary scanning buffer and an input buffer in accordance with the combinations of the first and second operation mode signals
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