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Bus arrangement for interconnecting circuit chips
| Details |
Inventors: Gfeller, Fritz R.;
Assignee: International Business Machines Corporation (Armonk, NY)
Primary Examiner: Edlow; Martin H.
Assistant Examiner: Badgett; J. L.
Attorney, Agent or Firm: Thornton; Francis J.
An optical bus arrangement is disclosed for interconnecting a plurality of circuit modules (15, 17 . . . ). It comprises a plurality of optical busses (25) each including a feeder waveguide (41) and a signal waveguide (43). Junctions (45) for controllably switching light from feeder to signal waveguide, and leaky regions (47) for detecting the status of the signal waveguide, are provided at regular intervals. Arrays of lasers/LEDs (33) at both ends constantly furnish light to the feeder waveguides. Each module has a plurality of input ports (27) each comprising a photodetector for detecting light from one leaky region, and a plurality of output ports (45) each comprising an electrode grating for controlling switching of light in one junction. Input ports and output ports are integrated portions of the chips. Thus, the optical waveguide switches disclosed have the specific feature of being partially incorporated as waveguide junction in a substrate (23), and partially as control electrodes integrated on a chip. |
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DETAILED DESCRIPTION For interconnecting a plurality of integrated circuit chips, optical waveguide buses are provided in a substrate.
Each optical bus consists of a feeder guide and a parallel signal guide which merge at regular intervals to form junctions.
Also provided at regular intervals are leaky regions of the signal guide allowing one to detect the state of the signal guide.
Each junction may be either inactive, confining the light to the feeder guide, or active to transfer light from the feeder to the signal guide.
If all junctions of a bus are inactive, the signal guide is dark (state "0").
If at least one junction of a bus is active, the whole signal guide is flooded with light (state "1") which can be detected at any of the leaky regions.
Each chip has several input and output ports instead of conducting pins.
Each output port comprises a Chevron grating and each input port comprises a photodiode.
Chips are so placed on the substrate that each grating coincides with a junction and each photodiode coincides with a leaky region.
The grating, when excited, generates a spatially periodic electric field penetrating into the substrate, thus causing a transfer of light from the feeder to the signal waveguide.
It is an object of the present invention to devise a circuit chip interconnection arrangement that allows close packaging and is suitable for large scale production.
Another object of the invention are means for inter-chip signal transfer which are not responsive to electrical noise signals and switching transients, but can be closely packed with the electronic circuit chips.
It is a further object of the invention to provide an optical chip interconnection system that needs no optically active or light-generating means in the circuit chips.
Another object of the invention is an interconnection system in which only integrated elements are required on circuit chips and on a substrate carrying the chips, without requirement of establishing individual connections between chip I/O ports and a bus system
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CPUs 
