CMOS output buffer circuit with improved ground bounce

DETAILED DESCRIPTION Accordingly, it is a general object of the present invention to provide a CMOS output buffer circuit with a significant reduction in ground bounce which is relatively simple and economical to manufacture and assemble, but yet overcomes the disadvantages of the prior art buffer circuits.
It is an object of the present invention to provide an improved CMOS output buffer circuit which has a significant reduction in inductive ringing.
It is another object of the present invention to provide a CMOS output buffer circuit which includes resistive means connected in series with the gates of certain ones of the transistors in the pull-up driver circuit and pull-down driver circuit so as to form RC delay circuits for limiting the rate of rise of the gate-to-source voltages.
It is still another object of the present invention to provide a CMOS output buffer circuit which is formed of a pull-up driver circuit, a pull-down driver circuit, and a control circuit for limiting the rate of rise of the gate-to-source voltages, thereby reducing significantly the ground bounce.
In accordance with these aims and objectives, the present invention is concerned with the provision of a CMOS output buffer circuit for providing an output signal at an output terminal with a significant reduction in ground bounce.
The CMOS output buffer circuit includes a pull-up driver circuit, a pull-down driver circuit, and a control circuit.
The pull-up driver circuit is responsive to a first control signal for generating a transition from a low logic level to a high logic level at the output terminal.
The pull-up driver circuit includes at least first and second pull-up transistors.
Each of the first and second pull-up transistors has one of its main electrodes connected to a power supply potential and its other one of its main electrodes coupled to the output terminal.
The gate of the first pull-up transistor is coupled to receive the first control signal.
The gate of the second pull-up transistor is coupled to receive the first control signal via a first resistive means