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Cellular-automaton-for-generating-random-data

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Cellular automaton for generating random data

Details

Inventors: McLeod, Robert; Card, Howard; Hortensius, Peter; Pries, Werner;
Assignee: University of Manitoba (Winnipeg, CA)
Primary Examiner: Harkcom; Gary V.
Assistant Examiner: Mai; Tan V.
Attorney, Agent or Firm: Sim & McBurney

A cellular automaton which generates pseudorandom data comprises a series of cells arranged such that each cell receives signals from electrically adjacent first and second cells. Each cell comprises a D-type flip-flop for storing a data bit, and logic circuitry which couples the flip-flop of the cell to those of associated first and second adjacent cells. The logic circuitry responds to the current state of the data bits stored by a particular cell and its associated first and second electrically adjacent cells by changing the value of the data bit stored by the particular cell according to the following relationship: a(t+1)=.sub.first (t) XOR[a(t) OR a.sub.second (t)] where, a(t) represents the current state of the data bit stored by the particular cell, a(t+1) represents the next state of the data bit stored by the particular cell, a.sub.first (t) represents the current state of the data bit stored by the first electrically adjacent cell, and a.sub.second (t) represents the current state of the data bit stored by the second electrically adjacent cell.

DETAILED DESCRIPTION We claim: 1.
A cellular automaton which generates pseudorandom data, comprising: a series of cells arranged such that each cell receives signals from first and second electrically adjacent cells; each particular cell in the series of cells having (a) a storage unit for electrically storing a data bit having two distinct states, the storage unit having an output terminal where the current state of the data bit is electrically detectable; and, (b) logic circuitry coupling the storage unit of the particular cell to the storage unit of the first electrically adjacent cell and to the storage unit of the second electrically adjacent cell, the logic circuitry responding to the current state of the data bit stored by the particular cell and the data bits stored by the first and second electrically adjacent cells by changing the value of the data bit stored by the particular cell according to the following relationship a(t+1)=a.
sub.
first (t)XOR[a(t)ORa.
sub.
second (t)] where, a(t) represents the current state of the data bit stored by the particular cell, a(t+1) represents the next state of the data bit stored by the particular cell, a.
sub.
first (t) represents the current state of the data bit stored by the first electrically adjacent cell, and a.
sub.
second (t) represents the current state of the data bit stored by the second electrically adjacent cell.
2.
A cellular automaton as claimed in claim 1 in which the storage unit of each of the series of cells comprises an input terminal for receiving a input signal having two distinct states, the storage unit changing the state of the stored data bit to conform to the current state of the input signal when a predetermined clock signal is applied to the storage unit.
3.
A cellular automaton as claimed in claim 2 in which the logic circuity of each particular cell receives the output signal produced by the storage unit of the particular cell and the output signals produced by the storage units of the first and second electrically adjacent cells and applies to the input terminal of the storage unit of the particular cell a signal having the value a

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