Communicating adder tree system for neural array processor

DETAILED DESCRIPTION In accordance with the apparatus of the invention, an array processor comprises a plurality of input function elements, with each input function element selectively allocated to a set of neurons, and each neuron including means for generating a neuron value from a selected set of input function elements and for communicating said neuron value back to said selected set of input function elements.
In accordance with the apparatus and method of this invention, the total connectivity of each neuron to all neurons, including itself, is accomplished by an orthogonal relationship of neurons: that is, a given multiplier element operates during a first cycle as a row element within an input function to a column neuron, and during a second cycle as a column element with an input function to a row neuron.
In accordance with the method of the invention, an array processor comprising orthogonal sets of neurons and a plurality of input function elements, is operated according to the method comprising the steps of (1) operating a first neuron upon a first subset of said input functions to generate and load back into said first subset a neuron value, and (2) allocating each of said first subset of input function elements to one of a set of orthogonal neurons.