Deep trench etch on bonded silicon wafer

DETAILED DESCRIPTION A sequence of steps for carrying out the invention is shown in FIGS.
2A-2D where like reference numerals refer to corresponding elements in FIGS.
1A-1D.
The invention solves a number of problems with prior art methods and may be used in connection with standard dry plasma etching equipment such as the Lamb/Quad 480 etch system.
The invention provides rapid, clean, and deep etching of trenches in a silicon-on-insulator/bonded wafer 100.
The invention has an etch rate that is equal to or greater than 1.
2 to 1.
3 microns per minute.
The invention etches trenches as deep as 22 microns.
The chemicals used with the invention include SF6 and C2.
These chemicals replace prior art chemicals that included conventional BCL3 and Cl2 etching chemistries which leave debris and thus create micromasking problems.
Micromasking occurs when a debris particle interferes with the etch.
Micromasking results in rough, rather than smooth, etched surfaces.
Micromasking results in "black silicon" when the rough surfaces are observed through optical inspection equipment.
It is believed that micromasking results from the use of boron in the etching chemistry.
By eliminating boron from the etching chemistries and adding SF6, micromasking is virtually eliminated.
The invention also eliminates top side oxide masks and relies solely on photoresist masks.
The SOI/bonded wafer substrate 100 has a device layer 16 that may be as thick as about 17-22 microns.
In the device layer 16 one skilled in the art may form integrated circuits and semiconductor devices including diodes, transistors, resistors, and capacitors.
Such devices may be formed using one or more fabrication technologies including bipolar fabrication, metal oxide semiconductor fabrication, and a combination of bipolar and metal oxide semiconductor fabrication techniques.
Such devices are separated from each other in device layer 16 by isolation trenches.
The trench 60 shown in FIG.
2D may be used to form an isolation trench as will be further described hereinafter