Home | Links | Contact Us | More About Intellectual Property | Bookmark
Search patents:
Home CPUs Digital-data-processing-system-with-asynchronous-sensing-units

 Recirculating memory with plural input-output taps
It is an object of this invention to provide a random access memory having serially coupled memory ...


 Semiconductor memory device comprising address holding flip-flop
This invention is intended to solve the above problem by providing a semiconductor memory device ...


 Semiconductor integrated circuit device
The inventors of the invention found out that in RAMs with built-in output circuits having a tri-...


 On chip buffering for optimizing performance of a bubble memory
According to the present invention the magnetic domain memory architecture comprises a plurality of ...


 Dynamically programmable logic circuits
It is an object of the present invention to provide a programmable logic circuit which can perform, ...


 Emitter-coupled logic circuit
OF THE PRIOR ART Description will be hereinafter made with reference to FIG. 1 to more clearly ...


 Apparatus and method for reducing power consumption in a computer system
A method and apparatus for reducing the power consumption of a processor in a computer system is ...


 Apparatus and method for displaying PMS information in a portable computer
Accordingly, it is an object of the present invention to provide an improved apparatus and method ...


 Logic circuit
The invention will be described below briefly. Namely, a plurality of ROM's of a large capacity ...


 Control module for reducing ringing in digital signals on a transmission line
In accordance with the present invention, an electronic control module is provided that reduces ...


 Digital data processing system with asynchronous sensing units

Details
Inventors: Maeda, Koji; Goda, Tadahiro;
Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP)
Primary Examiner: Ruggiero; Joseph F.
Assistant Examiner:
Attorney, Agent or Firm: Sughrue, Mion, Zinn, Macpeak and Seas

A digital data processing system in which system parameters in an electric power system such as current or voltage are sampled at predetermined time intervals and converted into digital data by analog-to-digital converter units. The sampling frequency is made higher than the expected frequency of variation of these parameters. Sensing units located remotely from one another sample these parameters at rates which are asynchronous between sensing units. The data transmitted from the various sensing units is sent to a central processing unit where the received signals are sampled synchronously and then processed in order to provide protection for the electric power system.

DETAILED DESCRIPTION In order to overcome the aforementioned drawbacks, the invention provides a digital data processing system of the type which can be used to protect a large-scale analog system such as an electric power system wherein variable parameters such as current or voltage representative of operational states of the system are sampled with a plurality of sensing units located remotely from one another using clock signals in each sensing unit which are asynchronous from unit to unit.
Analog-to-digital converter units in each of the sensing units convert a sensed parameter into digital data at a rate which is higher than expected variations with time of the sensed parameters to provide digital data representative thereof.
The digital data from each sensing unit is transmitted at a high rate to a data processing unit including a data processing device such as a digital computer.
The data from the various sensing units is synchronously sampled and inputted to the digital processing device through a buffer unit which may be implemented with a random access memory.
The digital processing device processes this data using the results to protect the analog system.



Related patents
  Cable tester for multipair cables
In elaborating on the particulars of the illustrative embodiment, it is helpful to visualize and discuss a layout of the complete system in an overview fashion. A...
  Apparatus and method of testing CML circuits
A test apparatus for CML integrated circuits is shown herein. The apparatus has a test unit which is capable of determining differences in the pulses and various ...
  High precision capacitance bridge
It is an object of this invention to measure impedance, and particularly capacitance, to extremely high precision at an improved speed and ease of use over prior art. It ...
  Split programmable logic array
The subject invention relates to an improved programmable logic array for producing a particular digital output given a certain digital input. The problem associated ...
  Dynamic re-programmable PLA
An advantage of the present invention resides in the provision of a unique design that is readily adaptable to standard MOS (metal oxide semiconductor) fabrication ...
  Multiple array customizable logic device
The present invention provides an integrated circuit having customizable logic, comprising a first programmable array means for receiving a plurality of first input ...
  Secure integrated circuit chip with conductive shield
We claim: 1. An integrated circuit chip containing a secure area in which secure data is processed and/or stored, comprising a semiconductive layer containing diffusions ...
  High speed state machine
Accordingly, it is an object of the present invention to provide a state machine in which the inputs to the present state latches are biased to increase speed of ...
  Programmable integrated circuit micro-sequencer device
OF THE PREFERRED EMBODIMENTS A preferred implementation of the basic building block of the present invention, the Dynamically Programmable Logic Device (DPLD), is ...
  Eprom low voltage sense amplifier
We claim: 1. A low voltage sense amplifier for an EPROM memory transistor comprising a low voltage inverter having an input selectively couplable to the EPROM memory ...

0.054

Archive: All patents - Links

Copyright (c)2006 Eipa-patents.org - All rights reserved