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Field programmable gate array with mask programmed analog function circuits
| Details |
Inventors: McGowan, John E.;
Assignee: Actel Corporation (Sunnyvale, CA)
Primary Examiner: Santamauro; Jon
Assistant Examiner: Le; Don Phu
Attorney, Agent or Firm: D'Alessandro & Ritchie
A mixed signal integrated circuit architecture comprising a mask programmable portion and a field programmable gate array portion. The mask programmable portion has a plurality of mask programmed analog function circuits, and a first group of input/output pads, wherein one of the input/output pads of the first group is connected to an input of one of the analog function circuits, and one of the input/output pads of the first group is connected to an output of one of the analog function circuits. The field programmable gate array portion has programmable digital logic function modules, a second group of input/output pads, interconnect conductors divided into one or more segments, wherein some segments run in a first direction and some segments run in a second direction to form intersections and some segments form intersections with inputs and outputs of the digital logic function modules, the first group of input/output pads, and inputs and outputs of the analog function circuits from the mask programmable analog portion, and user programmable interconnect elements connected between adjoining ones of the segments in a same one of the interconnect conductors, and between intersections of selected ones the first and second segments, intersections of inputs and outputs of the digital logic function modules and selected interconnect conductors, intersections of the first group of input/output pads and selected ones of the interconnect conductors, intersections with outputs of the analog function circuits and selected ones of the interconnect conductors, and intersections with the inputs of the analog function circuits and selected ones of the interconnect conductors. |
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DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT Those of ordinary skill in the art will realize that the following description of the present invention is illustrative only and not in any way limiting.
Other embodiments of the invention will readily suggest themselves to such skilled persons.
According to the present invention, a mixed signal integrated circuit has a FPGA portion for digital circuits, and a mask programmable portion for analog circuits.
By separating the digital circuits and analog circuits into a FPGA portion and a mask programmable portion, respectively, a substantial number of advantages are realized in the mixed signal system.
A great advantage is the retention of the optimization presently found in the art for digital circuits in an FPGA.
The digital circuits can be implemented by parallel and serial combinations of P-channel and N-channel MOS transistors in a very efficient manner as is known in the art.
Further, the size of the function module in the FPGA can be optimized so that there is a high degree of utilization of the logic modules by the digital circuits.
On the analog side in the mask programmable portion, the analog circuit functions can be implemented using a minimum of the resources of the integrated circuit.
The analog circuit functions may also be implemented simply and with a variety of topologies.
Further, the analog circuit functions can be separated by power buses from the noise found in the digital portion of the integrated circuit.
In CMOS technology, the mask programmable portion comprises N-channel and P-channel MOS transistors that can be connected together to implement almost any type of analog circuit conceivable in CMOS technology.
It should be appreciated that technologies other than CMOS are available for implementing the mask programmable portion of the present invention.
It should be further appreciated that the inputs and outputs of the analog circuits in the mask programmable portion of the integrated circuit to be described herein may be provided to a single I/O pin or several I/O pins
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CPUs 
