Integrated circuit fabrication critical dimension control using self-limiting resist etch

DETAILED DESCRIPTION In a basic aspect, the present invention provides an integrated circuit fabrication critical dimension control process including the steps of: depositing at least one layer of masking material; forming a mask of said at least one layer of masking material; etching said mask in a high density plasma with a masking material etch such that a critical dimension loss saturation point is reached and said step of etching enters a substantially constant saturation period limiting further critical dimension loss of said mask.
In another basic aspect, the present invention provides a high density plasma etch method for trimming photoresist to sub-photolithographic critical loss dimensions, including the steps of: establishing an HBr gas flow rate in a plasma chamber of the system in a range of approximately 50-sccm to 100 sccm, establishing an O.
sub.
2 flow rate in the plasma system chamber in a range of approximately 5-sccm to 15-sccm, providing a plasma chamber temperature in a range in the plasma system chamber of approximately 50.
degree.
to 75.
degree.
C.
, providing pressure in the plasma system chamber in a range of approximately three-milliTorr to ten-milliTorr, operating plasma generating source power in a range of approximately 500-Watts to 1000-Watts, and operating wafer bias power in a range of approximately 25-Watts to 125-Watts, such that trim etching achieves a substantially constant plateau.
In yet another basic aspect, the present invention provides an integrated circuit formed in accordance with a process.
Following patterning of photoresist mask features, the mask features trimmed using high density plasma etch method including the steps of: a) establishing an HBr gas flow rate in a plasma chamber of the system in a range of approximately 50-sccm to 100- sccm, b) establishing an O.
sub.
2 flow rate in the plasma system chamber in a range of approximately 5-sccm to 15-sccm, c) providing a plasma chamber temperature in a range in the plasma system chamber of approximately 50