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Integrated-circuit-testing-device-with-dual-purpose-analog-and-digital-channels

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Integrated circuit testing device with dual purpose analog and digital channels

Details

Inventors: Dinteman, Bryan J.;
Assignee: Credence Systems Corporation (Fremont, CA)
Primary Examiner: Tu; Christine T.
Assistant Examiner:
Attorney, Agent or Firm: Bedell; Daniel J. Smith-Hill and Bedell

An integrated circuit (IC) tester includes a set of dual-purpose digital/analog channels. Each tester channel includes a driver capable of supplying either a digital or analog test signal input to an IC terminal and a receiver for digitizing and processing either an analog or digital IC output signal appearing at the DUT terminal to produce results data representing the behavior of that IC output signal during a test. A test is organized into a succession of test cycles, and before each test cycle a pattern generator within each channel produces data for controlling the behavior of the driver and receiver during the test cycle. The control data controls whether the driver is to produce an analog or a digital test signal, controls a magnitude or logic level to which the test signal is to be driven during the test cycle, and controls a time during the test cycle of any test signal state or magnitude changes. The control data also indicates how and when the receiver digitizes and processes an IC output signal during the test cycle.

DETAILED DESCRIPTION What is claimed is: 1.
An apparatus for performing tests on integrated circuits, each integrated circuit having a plurality of terminals, wherein each of said tests is organized into successive test cycles, the apparatus comprising a plurality of tester channels, wherein each tester channel comprises: data generation means for generating a sequence of control data values during each of said tests, each control data value defining a test activity to be carried out at an IC terminal during a corresponding test cycle; and testing means for carrying out the test activity defined by each generated control data value during its corresponding test cycle, wherein test activities defined by said control data values include communicating with said IC terminal via a digital signal and communicating with said IC terminal via an analog signal, wherein said test activities defined by said control data values include generating and sending a test signal to an IC terminal, wherein said test signal is a digital signal during test cycles of some of said tests and an analog test signal during test cycles of others of said tests, and wherein said testing means comprises: digital-to-analog conversion (DAC) means for producing a first output signal of magnitude controlled by each control data value produced by said data generation means, and means for adjustably processing said first output in response to each control data value to produce said test signal.
2.
The apparatus in accordance with claim 1 wherein said means for adjustably processing said first output signal adjustably filters said first output signal in response to each control data value.
3.
The apparatus in accordance with claim 2 wherein said means for adjustably processing said first output signal further comprises a tristate buffer controlled by each control data value for buffering said first output signal to produce said test signal.
4.
The apparatus in accordance with claim 3 wherein said means for adjustably processing said first output signal comprises: a filter linking said DAC means to said tristate buffer for adjustably filtering said first output signal in response to each control data value, and a switch for selectively linking said DAC means to said buffer in response to each control data value

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