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Programmable logic array intergrated circuit devices |
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Scalable multiple level tab oriented interconnect architecture |
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Programming architecture for a programmable integrated circuit employing antifuses |
| OF THE PREFERRED EMBODIMENTS FIG. 1 is a diagram showing how FIGS. 1A, 1Ba, 1Bb, 1Bc, 1C, 1D, 1E, 1... |
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High density programmable logic device |
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Dedicated local line interconnect layout |
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Tile-based modular routing resources for high density programmable logic device |
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Programmable logic array integrated circuits |
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Electric socket adapter |
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Inverter function logic gate
| Details |
Inventors: Price, John E.; De Clue, Larry W.;
Assignee: Amdahl Corporation (Sunnyvale, CA)
Primary Examiner:
Assistant Examiner:
Attorney, Agent or Firm:
A bipolar logic gate is provided which will perform logical operations involving the complement of one or more input signals. The gate resembles the conventional ECL OR/NOR gate circuit except that a level shift input transistor is substituted for the standard reference transistor and shifts the voltage level of the input signal whose complement is to be included in the logical operation. A voltage shift of about -0.4 volts occurs either at the base or on the emitter of the level shift input transistor. As a consequence of the voltage shift and subsequent comparison with unshifted voltages, the input voltages are compared with each other rather than with a reference voltage, V.sub.BB. Logically, the complement of the input is included in the OR'd and NOR'd outputs provided on the output lines. The logic gate may be incorporated in combinational and sequential logic circuits. |
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DETAILED DESCRIPTION What is claimed is: 1. A bipolar gate circuit for Performing a logical operation on data represented by input signals including a logical operation on the complement of data represented by one of the input signals, comprising: at least one input transistor; a resistor connected between the collector of said at least one input transistor and the supply voltage, V. sub. CC ; at least one level shift input bipolar transistor means having its emitter connected to the emitter of said at least one input transistor and having its base coupled to the input signal whose complementary data is included in said logical operation; a second resistor connected between the collector of said at least one level shift input bipolar transistor means and said supply voltage, V. sub. CC ; a current source connected to said common emitter connection of said at least one input transistor and said at least one level shift input bipolar transistor means; whereby said level shift input pipolar transistor means serves to shift the level of the input signal whose complementary data is included in said logical operation to a level below the standard ECL signal levels so that the signal delivered to the common emitter connection is a level shifted representation of said input signal whose complementary data is included in said logical operation. 2. A bipolar gate circuit in accordance with claim 1 in combination with an output transistor having its base connected to said collector of said at least one input transistor, having its collector connected to the supply voltage V. sub. CC and having its emitter coupled through a pulldown resistor to the low potential V. sub. EE, whereby the voltage level on said emitter of said output transistor constitutes a NOR logic combination of the logic signals on said at least one input transistor and said complement of said input signal supplied to said level shift input bipolar transistor means. 3. A bipolar gate circuit in accordance with claim 2 in combination with another output transistor having its base connected to said collector of sait at least one level shift input bipolar transistor means, having its collector connected to said supply line, V
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