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 Level converter circuit for converting ECL-level input signals

Details
Inventors: Oguri, Takashi;
Assignee: NEC Corporation (Tokyo, JP)
Primary Examiner: Hudspeth; David R.
Assistant Examiner:
Attorney, Agent or Firm: Leydig, Voit & Mayer

A level converter circuit, in which a bipolar transistor for raising an output voltage is switched on or off by a logical-BiMIS construction, and a MIS transistor for falling the output voltage is also switched on or off by a logic circuit and a charge discharge means 50 so as to reduce a propagation delay time, to raise a driving ability, to prevent a steady state current and to reduce a dissipation current.

DETAILED DESCRIPTION It is therefore an object of the present invention to provide a level converter circuit in view of the aforementioned defects of the prior art, which is capable of reducing a propagation delay time with respect to an input signal and a dissipation current.
In accordance with one aspect of the present invention, there is provided a level converter circuit, comprising first bipolar transistor means having a collector and an emitter connected to a power source and an output terminal, respectively; first charge discharge means connected between the output terminal and a reference voltage; first logic circuit means for inputting at least two input signals and feeding an output to the first charge discharge means; second logic circuit means for inputting at least two input signals and the output of the first logic circuit means and feeding an output to a base of the first bipolar transistor means; and second charge discharge means connected between the first charge discharge means and the reference voltage.
In accordance with another aspect of the present invention, there is provided a level converter circuit, comprising first bipolar transistor means having a collector and an emitter connected to a power source and an output terminal, respectively; first charge discharge means connected between the output terminal and a reference voltage; first logic circuit means for inputting at least two input signals and feeding an output to the first charge discharge means; and second logic circuit means for inputting at least two input signals and the output of the first logic circuit means and feeding an output to a base of the first bipolar transistor means.
In accordance with a further aspect of the present invention, there is provided a level converter circuit, comprising first bipolar transistor means having a collector and an emitter connected to a power source and an output terminal, respectively; first charge discharge means connected between the output terminal and a reference voltage; first logic circuit means for inputting at least two input signals and feeding an output to the first charge discharge means; second logic circuit means for inputting at least two input signals and feeding an output to a base of the first bipolar transistor means; and second charge discharge means connected between the first charge discharge means and the reference voltage



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