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Method of multiple CPU logic simulation
| Details |
Inventors: Court, Thomas L.; Rivers, Alan;
Assignee: Cray Research, Inc. (Eagan, MN)
Primary Examiner: Harrell; Robert B.
Assistant Examiner:
Attorney, Agent or Firm: Merchant, Gould, Smith, Edell, Welter & Schmidt
Software simulation of a multiple CPU computer system design utilizes integer type program statements having program variables typed as integer that correspond to the boolean input variables of the design equations. Each of the program variables is assigned to a digital word having at least as many bits as the number of CPUs, with the boolean value of variables for each CPU represented by one of the bits in the word as a binary one or zero. The program statements are executed on a computer and evaluated to provide a result word wherein the individual bits of the result word represent the logic output state of the boolean equation for each CPU. |
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DETAILED DESCRIPTION The present invention provides a method of simulating the hardware design of a multiple CPU computer system, wherein the CPU's have a common design and the design is specified in boolean logic equations.
The method includes creating a program statement for a boolean logic equation of the design, with the statement having program variables typed as integers that correspond to the boolean input variables of the equation, and with each of the program variables assigned to a digital word having at least as many bits as the number of CPUs.
The method further provides, for each CPU, a true/false input value for each input variable, with true and false values being represented by the binary values 1 and 0, respectively.
The method further comprises packing the word assigned to each term with the input values for each CPU, wherein the values for each CPU are packed in corresponding bit positions in each word.
Finally, the method provides that the program statement is executed on a computer so that it is evaluated to provide a result word wherein the individual bits of the result word represent the logic output state of the boolean equation for each CPU.
Accordingly, the present invention provides a method for "packing" program variables with data from multiple CPUs wherein the variables can be used in program statements to simultaneously evaluate the boolean logic for a plurality of CPUs.
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CPUs 
