Zero-insertion force electrical connector |
| OF THE INVENTION A preferred embodiment of the connector 20 of this invention includes the female ... |
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Reduced insertion force connector |
| It is one of the objects of the present invention to provide a simplified way of manufacturing low ... |
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Connector device for printed boards |
| The primary object of the present invention is to provide a connector device for a pair of printed ... |
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Contact probe assembly having rotatable contacting probe elements |
| We claim: 1. An electrical probe assembly comprising a plurality of elongated probe elements formed ... |
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Low insertion force connector with improved cam actuator |
| In accordance with the present invention, there is provided a zero or low insertion force connector ... |
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Low insertion force connection arrangement |
| OF THE INVENTION Referring now to FIG. 1 there is shown an arrangement for connecting a first ... |
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Card edge connector |
| We claim: 1. A zero insertion force, card edge connector for interconnecting circuits on a circuit ... |
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ZIE edge connector |
| Referring now to the Drawings, and particularly referring to FIG. 1, there is shown a circuit ... |
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High density stacking connector |
| An electrical connector in accordance with the present invention comprises a nonconductive base ... |
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Method for providing for automatic topology discovery in an ATM network or the like |
| The present invention provides a method and apparatus for providing for automatic topology ... |
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N+K sparing in a telecommunications switching environment
| Details |
Inventors: Teraslinna, Kari T.;
Assignee: AT&T Bell Laboratories (Murray Hill, NJ)
Primary Examiner: Olms; Douglas W.
Assistant Examiner: Jung; Min
Attorney, Agent or Firm: Volejnicek; David
An N+1 sparing strategy for both line circuits and switching nodes of a self-routing 3-stage Benes packet telecommunications network. Line circuits selectively serve either their own telecommunications line or the line normally served by the corresponding line circuit of the preceding row of the switching matrix. A row of spare line circuits and switching nodes is provided. Upon failure of a matrix internal node, line circuits modify packet addresses to reroute packets normally served by the failed node, or nodes below it within the same switching stage, to the next-lower row. Upon failure of a matrix edge node, line circuits of the failed node's row are disabled and line circuits of each row below it commence to serve the lines normally served by the preceding row. Active line circuits also modify packet addresses to reroute packets normally served by the last-stage node of the failed node's row, or rows below it, to the next-lower row. Upon failure of a line circuit, it is disabled and corresponding line circuits of each row below it commence to serve the lines normally served by the corresponding line circuit of the preceding row. Active line circuits also modify packet addresses to reroute packets normally switched to the failed line circuit or to the corresponding line circuits of the rows below it, to the corresponding line circuit of the next lower row. |
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DETAILED DESCRIPTION FIGS. 1 and 2 show in block diagram form an illustrative switching system of a self-routing telecommunications system. The switching system comprises a switching network 300 having a plurality of switching nodes 340 to 389 arranged into a matrix, and a plurality of line (or trunk) circuits 200 to 269 which interface switching network 300 to telecommunication lines 100 to 159. Lines 100 to 159 are bidirectional, and so are line circuits 200 to 269. But for purposes of ease of illustration, lines 100 to 159 have been shown separated into their incoming components 100-1 to 159-1 and outgoing components 100-2 to 159-2, and line circuits 200 to 269 have also been shown separated into their incoming components 200-1 to 269-1 and outgoing components 200-2 to 269-2. Switching network 300 has a conventional configuration--that of a 3-stage Benes network. Such networks are becoming the standard networks for broadband packet communications. Nodes 340 to 389 are arranged into a regular matrix of rows 1 to (N+1) and columns, or stages, 1 to 3. Each node 340 to 389 is a symmetrical switching node having (N+1) inputs and (N+1) outputs--(N+1) equal to 32 being common in the industry. Nodes 340 to 389 are conventional self-routing network nodes. Each receives at its inputs packets that carry their own destination address information. A node examines the address information of each received packet and, based on that information, routes the packet to one of its outputs. According to the invention, fault-tolerance is achieved in the switching system of FIG. 1 through an "N+1" type of sparing arrangement. That is, within the sequence of rows 1 to (N+1), only switching nodes of rows 1 to N are normally active and switching packetized traffic, while nodes of row (N+1) are normally spare and are used only when a fault incapacitates a unit of one of the rows 1 to N. Since nodes of row (N+1) are normally not used, and since these nodes are connected to only the last one input and/or output of each node of rows 1 to N, the functional size of each node 340-389 is reduced, for purposes of normal operation, to N
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