Programmable logic array integrated circuits

DETAILED DESCRIPTION The present invention provides programmable logic array integrated circuits in which signal conductors are interconnected not by relatively large and complex programmable interconnections, but by relatively small and simple fixed interconnections to multiplexers which can then be programmed to effect the desired interconnections.
Instead of having a signal conductor which crosses several other signal conductors programmably connectable to each of those other conductors by programmable elements at or near the intersection, a simple non-programmable transverse connection is made to each of those other conductors, and the transverse connections are applied in parallel to a multiplexer.
The multiplexer can then be programmed to select one of its inputs as its output.
The output of the multiplexer can be an input to a programmable logic element, an output from the integrated circuit, or a lead which is programmably connectable to one or more of several other conductors in the device.
Another interconnection technique which can be advantageously employed in accordance with the principles of this invention is to group the programmable logic elements into a plurality of mutually exclusive groups, each group having associated with it one or more conductors which can only be used to interconnect the elements in that group.
In addition, there are other conductors which can be used to convey signals between the groups.
Grouping the programmable logic elements in mutually exclusive (i.
e.
, non-overlapping) groups helps to simplify the task of programming the device by breaking the device down into several discrete parts, each of which is smaller and more easily managed than the whole device.
Providing signal conductors which serve only to interconnect the programmable logic elements in each group avoids tying up much longer conductors just to make short interconnections between adjacent programmable logic elements.
This helps to reduce the required number of long conductors.
In the above-described arrangement in which the programmable logic elements are grouped and each group is uniquely associated with certain interconnection signal conductors, each programmable logic element may be augmented with a programmable output stage which can be used either to feed the output of that programmable logic element to conductors which go beyond the associated group or to the interconnect conductors of the associated group