 High density programmable logic device |
| The programmable logic device (PLD) of this invention is a high density segmented PAL-like device ... |
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| Dedicated local line interconnect layout |
| An electrical connection arrangement for a programmable integrated circuit is described. An ... |
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| Tile-based modular routing resources for high density programmable logic device |
| The present invention relates to signal routing resource tiles that can be manipulated as circuit "... |
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| Programmable logic array integrated circuits |
| The present invention provides programmable logic array integrated circuits in which signal ... |
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| Electric socket adapter |
| In accordance with this invention, a socket adapter having any combination of a rectifier, ... |
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| Memory arbitration between timekeeping circuitry and general purpose computer |
| It is, therefore, an object of this invention to provide a method and circuitry for arbitrating ... |
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| Transition for electrical apparatus |
| I claim: 1. An electrical transition comprising: a) a nonconductive base having extending upwardly ... |
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| Microprogram control system |
| The present invention intends to eliminate the above disadvantages and has for its object to ... |
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Programmable logic integrated circuits with partitioned logic element using shared lab-wide signals
| Details |
Inventors: Pedersen, Bruce B.;
Assignee: Altera Corporation (San Jose, CA)
Primary Examiner: Westin; Edward P.
Assistant Examiner: Roseen; Richard
Attorney, Agent or Firm: Townsend and Townsend and Crew
A programmable logic device (10) has a number of programmable logic elements (LEs) (12) which are grouped together in a plurality of logic array blocks (LABs) (14). An LE incorporates a plurality of partitioned look-up tables (40a, 40b) that may be selectively connected to its inputs and outputs by means of a number of multiplexers (44a-d, 46). Shared LAB-wide input lines (43a, 43b) provide a shared input line into a number of LEs in a LAB. A digital information processing system (500) incorporating the invention is disclosed. A wide-input AND gate (74) combining the outputs of a number of LEs is disclosed. |
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DETAILED DESCRIPTION The invention provides an improved programmable logic device for use in digital circuits and systems in which a LE is implemented as at least two LUTs and where LUTs are connectable to one or more LAB-wide input signals.
This design allows for far larger and more complex logic functions to be implemented in a single LAB than in prior art PLDs.
A computer system or other digital processing machine incorporating the invention will benefit from the added flexibility and reprogrammability of the PLD.
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