Home | Links | Contact Us | More About Intellectual Property | Bookmark
Search patents:
Home CPUs Recirculating-memory-with-plural-input-output-taps

 Apparatus for sensing data in data bus lines
It is an object to provide a data sense circuit which prevents the charge share caused by direct ...


 Programmable circuit arrangement
We claim: 1. A circuit which can be programmed by applying a programming voltage so that the ...


 Read-only memory with few programming signal lines
It is accordingly an object of the present invention to enable a PROM to be programmed using only a ...


 System for dynamically exchanging and matching revision information between host and terminal
An object of the present invention is to eliminate such a drawback and to provide a system for ...


 Registered logic macrocell with product term allocation and adjacent product term stealing
This invention provides a macrocell with product term allocation and adjacent product term stealing....


 Apparatus and method for product term allocation in programmable logic
A programmable logic device having an allocation scheme for pooling product terms is described. In ...


 Level converter circuit for converting ECL-level input signals
It is therefore an object of the present invention to provide a level converter circuit in view of ...


 Logic gates with controllable time delay
These needs are met by providing a variable threshold voltage logic element. The threshold voltage ...


 Programmable logic cell and array
OF DRAWING FIG. 1 depicts an array 10 of cells 20 formed in accordance with the present invention. ...


 Output logic macrocell with enhanced functional capabilities
This invention provides an output logic macrocell for use with a logic block such as a programmable ...


 Recirculating memory with plural input-output taps

Details
Inventors: Gardner, Harry N.;
Assignee: Motorola, Inc. (Schaumburg, IL)
Primary Examiner: Konick; Bernard
Assistant Examiner: McElheny; Donald
Attorney, Agent or Firm: Nielsen; Walter W.

A CCD (charge coupled device) RAM (random access memory) includes a plurality of "rings" of serially connected CCDs in which digital information recirculates. A combinational decoder selects one of the plurality of rings by decoding a first group of binary address inputs. Each ring includes a plurality of input/output circuits coupled to associated "taps", each tap being coupled between an input and an output of a CCD regeneration cell. An address addition circuit includes a counter which counts at the same rate that data shifts through each of the rings and has a plurality of taps spaced at the same intervals (numbers of intervening CCD cells) as the taps in each of the rings. The counter outputs are decoded to provide a first internal address corresponding to the location of a fictitious tag bit in a ring with reference to an initial reference bit in a ring.

DETAILED DESCRIPTION It is an object of this invention to provide a random access memory having serially coupled memory cells.
It is another object of the invention to provide a random access memory having a plurality of rings of serially coupled memory cells, each of the rings having spaced taps and associated address circuitry for selecting one of the rings and one of the taps, and for producing a strobe signal enabling the addressed bit of information to be read out from a selected tap when the addressed information appears at that tap.
Briefly described, the invention is a random access memory including a plurality of sequentially coupled storage cells for recirculating data.
The random access memory includes address circuitry for addressing any particular bit of data recirculating in the memory, and also includes circuitry for counting the number of memory cells through which the addressed bit has shifted from a reference storage cell and adding that number to a binary address corresponding to the addressed bit of data to produce an internal address corresponding to the actual physical location of the addressed bit of recirculating data.
A decoder decodes the internal address corresponding to the actual physical location of the address bit and selects the actual physical location.
In one embodiment, a plurality of rings of recirculating storage cells are provided, and decode means are provided to select one of the rings.
Spaced taps are provided on each ring and tap select circuitry is provided to select the next tap at which the addressed bit of data will appear in each of the rings.
A strobe circuit is provided to generate a read/write enable pulse to enable input/output circuitry associated with the selected tap to write data into or read data out of a selected tap at the time that the addressed bit is located at the selected tap.



Related patents
  Semiconductor memory device comprising address holding flip-flop
This invention is intended to solve the above problem by providing a semiconductor memory device which comprises said flip-flop within the IC and realizes a higher ...
  Semiconductor integrated circuit device
The inventors of the invention found out that in RAMs with built-in output circuits having a tri-state output function (capable of taking the output of a high impedance ...
  On chip buffering for optimizing performance of a bubble memory
According to the present invention the magnetic domain memory architecture comprises a plurality of main storage loops disposed between a write-in section and a read-out ...
  Dynamically programmable logic circuits
It is an object of the present invention to provide a programmable logic circuit which can perform, under control of program variables, a number of logic functions, ...
  Emitter-coupled logic circuit
OF THE PRIOR ART Description will be hereinafter made with reference to FIG. 1 to more clearly show the drawbacks of a prior-art emitter-coupled logic circuit. In FIG. 1...
  Apparatus and method for reducing power consumption in a computer system
A method and apparatus for reducing the power consumption of a processor in a computer system is described. The present invention includes a programming structure ...
  Apparatus and method for displaying PMS information in a portable computer
Accordingly, it is an object of the present invention to provide an improved apparatus and method for displaying power management system (PMS) information in a portable ...
  Logic circuit
The invention will be described below briefly. Namely, a plurality of ROM's of a large capacity constituted by IIL circuits are prepared, and one of them is selected by ...
  Control module for reducing ringing in digital signals on a transmission line
In accordance with the present invention, an electronic control module is provided that reduces ringing in the digital signals on a transmission line which has multiple ...
  For conditioning the input to or the output from an integrated circuit
The present invention has been developed to obviate the above-described problems and has as its first object the provision of a programmable input/output circuit ...

0.024

Archive: All patents - Links

Copyright (c)2006 Eipa-patents.org - All rights reserved