Refresh method capable of reducing memory cell access time in semiconductor memory device

DETAILED DESCRIPTION Therefore, an object of the present invention is to provide a refresh method for a semiconductor memory device capable of reducing memory cell access time and performing refresh operation normally.
Another object of the invention is to provide a refresh method for a semiconductor memory device capable of performing normal operation and refresh operation at the same time.
A refresh method according to the present invention comprises the steps of latching a low address for refresh operation when the refresh operation is requested, determining whether a normal operation command is inputted into the semiconductor memory device, comparing block selection bits of a low address for normal operation with block selection bits of the latched low address for the refresh operation when the normal operation command is inputted into the semiconductor memory device, and activating a word line for the refresh operation by decoding the latched low address for the refresh operation when the block selection bits of the low address for the normal operation are different from the block selection bits of the latched low address for the refresh operation.
In a preferred embodiment, the method further comprises the steps of maintaining the latched low address for the refresh operation when the normal operation command is not inputted into the semiconductor memory device, and maintaining the latched low address for the refresh operation when the block selection bits of the low address for normal operation are the same as the block selection bits of the latched low address for the refresh operation.
In the present invention, a word line for the normal operation is activated by simultaneously decoding the low address for the normal operation while the latched low address for the refresh operation is decoded.
That is, the normal operation and the refresh operation are simultaneously performed.
In one preferred embodiment, a refresh method for a semiconductor memory device comprises the steps of latching a low address for refresh operation when the refresh operation is requested; determining a mode of the semiconductor memory device; activating a word line for the refresh operation by decoding the latched low address for the refresh operation when the mode of the semiconductor memory device is a stand-by mode