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Home CPUs STM-to-ATM-converters

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 STM-to-ATM converters

Details
Inventors: Eng, Kai Y.; Martin, Gary D.; Pashan, Mark A.; Punj, Vikram; Spanke, Ronald A.;
Assignee: AT&T Corp. (Murray Hill, NJ)
Primary Examiner: Marcelo; Melvin
Assistant Examiner:
Attorney, Agent or Firm:

A data stream is converted from a synchronous transfer mode (STM) to an asynchronous transfer mode (ATM) by extracting data of a number of payload signals from the data stream, writing data of the payload signal into a random access memory (RAM), separately recording address locations of the data of each of the payload signals in separate buffers, directing the RAM to separately read the data of the payload signals, and attaching a cell header to the data read from the RAM to form ATM cells.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS The converter of FIG.
1 is an example of an SAC which converts the payload of an incoming 2.
5 Gb/s STM-16c signal into ATM cells.
Specifically, the incoming SDH signal SI passes to a synchronous data hierarchy SDH framing and processing block FP for removal of the signal overhead and extraction of the payload.
The STM payload now passes to a data RAM DR which writes the payload bytes into the RAM.
Simultaneously operating and separate first-in-first-out (FIFO) buffers FIFO1 .
.
.
FIFOn record the address locations, within the RAM DR with respect to different payload signals.
The example of FIG.
1 shows 48 FIFO buffers for a maximum of 48 DS-3 signals.
That is, as shown, the system is programmed for extracting up to 48 separate payload signals and acts on them individually for ATM conversion.
A programmable controller PC receives the addresses from the FIFO buffers FIFO1 to FIFOn and directs the RAM DR to read out the data bytes of a single specific payload signal.
The controller PC attaches a cell header to specific data cells to form an AMT cell.
The cells from the data RAM pass to a multiplexer MUX along with the cell header.
According to one embodiment of the invention, the cell header is the standard ATM cell header.
According to another embodiment, the cell header is an internal cell header of an ATM switch or cross connect.
The latter is an expanded version of the standard cell.
The multiplexer MUX passes ATM signals out of the system.
The invention furnishes a PSAC (Programmable SAC) for the incoming signal and has its payload signals converted into ATM cells.
The 2.
5 Gb/s (STM-16c) signal is only an example.
The embodiment provides a flexible device which can cope with a large variety of signal compositions and can be "reprogrammed" to perform ATM conversions on different signal combinations.
FIG.
1 shows a programmable SAC (PSAC) for conversion of STM payload into cells.
It contemplates a delay for DS3 of less than 50 microseconds.
As shown in FIG



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