Home | Links | Contact Us | More About Intellectual Property | Bookmark
Search patents:
Home CPUs Secure-integrated-circuit-chip-with-conductive-shield

 Apparatus and method for displaying PMS information in a portable computer
Accordingly, it is an object of the present invention to provide an improved apparatus and method ...


 Logic circuit
The invention will be described below briefly. Namely, a plurality of ROM's of a large capacity ...


 Control module for reducing ringing in digital signals on a transmission line
In accordance with the present invention, an electronic control module is provided that reduces ...


 For conditioning the input to or the output from an integrated circuit
The present invention has been developed to obviate the above-described problems and has as its ...


 Apparatus for sensing data in data bus lines
It is an object to provide a data sense circuit which prevents the charge share caused by direct ...


 Programmable circuit arrangement
We claim: 1. A circuit which can be programmed by applying a programming voltage so that the ...


 Read-only memory with few programming signal lines
It is accordingly an object of the present invention to enable a PROM to be programmed using only a ...


 System for dynamically exchanging and matching revision information between host and terminal
An object of the present invention is to eliminate such a drawback and to provide a system for ...


 Registered logic macrocell with product term allocation and adjacent product term stealing
This invention provides a macrocell with product term allocation and adjacent product term stealing....


 Apparatus and method for product term allocation in programmable logic
A programmable logic device having an allocation scheme for pooling product terms is described. In ...


 Secure integrated circuit chip with conductive shield

Details
Inventors: Gilberg, Robert C.; Knowles, Richard M.; Moroney, Paul; Shumate, William A.;
Assignee: General Instrument Corporation (New York, NY)
Primary Examiner: Popek; Joseph A.
Assistant Examiner:
Attorney, Agent or Firm: Callan; Edward W.

An integrated circuit chip containing a secure area in which secure data is processed and/or stored, includes a semiconductive layer containing diffusions defining circuit element components; a first conductive layer coupled to the semiconductive layer to interconnect the components to thereby define circuit elements for distributing, storing processing and/or affecting the processing of secure data; and a second conductive layer overlying the circuit elements to thereby define a secure area in which the circuit elements are shielded from inspection, and coupled to the circuit elements for conducting to the circuit elements a predetermined signal that is essential to an intended function of the shielded circuit elements, whereby removal of the second conductive layer will prevent the predetermined essential signal from being provided to the circuit elements and thereby prevent the intended function.

DETAILED DESCRIPTION We claim: 1.
An integrated circuit chip containing a secure area in which secure data is processed and/or stored, comprising a semiconductive layer containing diffusions defining circuit element components; a first conductive layer coupled to the semiconductive layer to interconnect the components to thereby define circuit elements for distributing, storing, processing and/or affecting the processing of secure data; and a second conductive layer overlying the circuit elements to thereby define a secure area in which the circuit elements are shielded from inspection, and coupled to the circuit elements for conducting to the circuit elements a predetermined signal that is essential to an intended function of the circuit elements, whereby removal of the second conductive layer will prevent the predetermined essential signal from being provided to the circuit elements and thereby prevent the intended function.
2.
An integrated circuit chip according to claim 1, wherein the predetermined signal is a power signal.
3.
An integrated circuit chip according to claim 2, wherein the shielded circuit elements include a volatile memory for storing secure data, with the memory being powered by the predetermined power signal.
4.
An integrated circuit chip according to claim 3, wherein each of a plurality of the volatile memories is separately coupled to only that portion of the second conductive layer that overlies such memory for receiving the predetermined power signal from only that overlying portion of the second conductive layer.
5.
An integrated circuit chip according to claim 2, further containing a nonsecure area in which nonsecure data and control signals are processed and/or stored, wherein the shielded circuit elements include logic circuit elements for enabling transfer of nonsecure data and/or control signals between the secure area and the nonsecure area, with the logic circuit elements being powered by the predetermined power signal.
6.
An integrated circuit chip according to claim 5, wherein each of a plurality of the logic circuit elements is separately coupled to only that portion of the second conductive layer that overlies such logic circuit element for receiving the predetermined power signal from only that overlying portion of the second conductive layer



Related patents
  High speed state machine
Accordingly, it is an object of the present invention to provide a state machine in which the inputs to the present state latches are biased to increase speed of ...
  Programmable integrated circuit micro-sequencer device
OF THE PREFERRED EMBODIMENTS A preferred implementation of the basic building block of the present invention, the Dynamically Programmable Logic Device (DPLD), is ...
  Eprom low voltage sense amplifier
We claim: 1. A low voltage sense amplifier for an EPROM memory transistor comprising a low voltage inverter having an input selectively couplable to the EPROM memory ...
  Recirculating memory with plural input-output taps
It is an object of this invention to provide a random access memory having serially coupled memory cells. It is another object of the invention to provide a random ...
  Semiconductor memory device comprising address holding flip-flop
This invention is intended to solve the above problem by providing a semiconductor memory device which comprises said flip-flop within the IC and realizes a higher ...
  Semiconductor integrated circuit device
The inventors of the invention found out that in RAMs with built-in output circuits having a tri-state output function (capable of taking the output of a high impedance ...
  On chip buffering for optimizing performance of a bubble memory
According to the present invention the magnetic domain memory architecture comprises a plurality of main storage loops disposed between a write-in section and a read-out ...
  Dynamically programmable logic circuits
It is an object of the present invention to provide a programmable logic circuit which can perform, under control of program variables, a number of logic functions, ...
  Emitter-coupled logic circuit
OF THE PRIOR ART Description will be hereinafter made with reference to FIG. 1 to more clearly show the drawbacks of a prior-art emitter-coupled logic circuit. In FIG. 1...
  Apparatus and method for reducing power consumption in a computer system
A method and apparatus for reducing the power consumption of a processor in a computer system is described. The present invention includes a programming structure ...

0.014

Archive: All patents - Links

Copyright (c)2006 Eipa-patents.org - All rights reserved