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High speed state machine
Accordingly, it is an object of the present invention to provide a state machine in which the inputs to the present state latches are biased to increase speed of ...
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Programmable integrated circuit micro-sequencer device
OF THE PREFERRED EMBODIMENTS A preferred implementation of the basic building block of the present invention, the Dynamically Programmable Logic Device (DPLD), is ...
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Eprom low voltage sense amplifier
We claim: 1. A low voltage sense amplifier for an EPROM memory transistor comprising a low voltage inverter having an input selectively couplable to the EPROM memory ...
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Recirculating memory with plural input-output taps
It is an object of this invention to provide a random access memory having serially coupled memory cells. It is another object of the invention to provide a random ...
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Semiconductor memory device comprising address holding flip-flop
This invention is intended to solve the above problem by providing a semiconductor memory device which comprises said flip-flop within the IC and realizes a higher ...
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Semiconductor integrated circuit device
The inventors of the invention found out that in RAMs with built-in output circuits having a tri-state output function (capable of taking the output of a high impedance ...
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On chip buffering for optimizing performance of a bubble memory
According to the present invention the magnetic domain memory architecture comprises a plurality of main storage loops disposed between a write-in section and a read-out ...
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Dynamically programmable logic circuits
It is an object of the present invention to provide a programmable logic circuit which can perform, under control of program variables, a number of logic functions, ...
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Emitter-coupled logic circuit
OF THE PRIOR ART Description will be hereinafter made with reference to FIG. 1 to more clearly show the drawbacks of a prior-art emitter-coupled logic circuit. In FIG. 1...
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Apparatus and method for reducing power consumption in a computer system
A method and apparatus for reducing the power consumption of a processor in a computer system is described. The present invention includes a programming structure ...
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