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Semiconductor memory device and method of data transfer therefor
| Details |
Inventors: Kobayashi, Toshifumi; Morooka, Yoshikazu; Yamada, Michihiro; Hamamoto, Takeshi;
Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP)
Primary Examiner: Whitfield; Michael A.
Assistant Examiner:
Attorney, Agent or Firm: Lowe, Price, LeBlanc & Becker
Sense amplifiers provided for each of the bit line pairs are divided into groups to be independently driven, whereby the influence of sense amplifiers of different groups can be prevented, and therefore the destruction of data of the non-selected memory cells during data transfer can be prevented. In transferring data from the data register to the memory cell array, the sense amplifier is not activated until the stored information of the memory cells selected by the word line is fully read to the corresponding bit lines, whereby the destruction of data stored in the non-selected memory cells can be prevented. |
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DETAILED DESCRIPTION The present invention was made to solve the above described problem and its object is to prevent damage to the data stored in a non selected memory cell when partial data transfer is carried out between a memory cell and a data register.
Briefly stated, in the present invention, a plurality of sense amplifier driving means are provided, one for every group of bit line pairs, each sense amplifier driving means being commonly connected to sense amplifiers of the corresponding group and separated from sense amplifier of other groups.
Consequently, the sense amplifier activating signal line pair extending from each sense amplifier driving means are separated between the group of sense amplifier executing the data transfer and the group of sense amplifiers in which the data transfer is intercepted, whereby they are driven independent from each other.
Consequently, the destruction of stored information of the non-selected memory cell can be prevented when partial data transfer is carried out from the data register to the memory cell.
In accordance with another aspect of the present invention, in data transfer from the data register to the memory cell, the memory cell is selected by the word line after the bit line is precharged, the data of the selected memory cell is fully read to the bit line, then the data register and the bit line pair are selectively connected by gate means, and thereafter the sense amplifier is activated.
Consequently, the amplifying operation of the sense amplifier is not started until the data of the memory cell is fully read on the bit line on which the data transfer from the data register to the memory cell is intercepted.
Therefore, the destruction of the data stored in the said memory cell can be prevented.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
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