Self-timed data pipeline apparatus using asynchronous stages having toggle flip-flops
The present invention finds application in the area of asynchronous circuits, and more particularly, in the area of self-timed data pipelines. The present invention can be utilized in any context wher... Read More
Inventors: Traylor, Roger L.;, Assignee: Intel Corporation (Santa Clara, CA) |
High performance single port RAM generator architecture
According to the present invention, a single-port RAM generator, in a CAD environment, generates different RAM structures. The generated RAM structure has a static RAM (SRAM) matrix and a self-timed c... Read More
Inventors: Baroni, Andrea; Mastrodomenico, Giovanni; Michele, Taliercio; Capocelli, Piero; Carro, Luigi; Varambally, Rajamohan;, Assignee: SGS-Thomson Microelectronics S.r.l (Agrate Brianza, IT) |
High performance single port RAM generator architecture
According to the present invention, a single-port RAM generator, in a CAD environment, generates different RAM structures. The generated RAM structure has a static RAM (SRAM) matrix and a self-timed c... Read More
Inventors: Baroni, Andrea; Mastrodomenico, Giovanni; Taliercio, Michele; Capocelli, Piero; Carro, Luigi; Varambally, Rajamohan;, Assignee: SGS-Thomson Microelectronics S.r.l. (Agrate Brianza, IT) |
Asynchronous self-tuning clock domains and method for transferring data among domains
According to the invention, a digital circuit, sub-system or system includes one or more portions (i.e., domains) that are independently clocked with separate, adjustable clocks. Each clock is an asyn... Read More
Inventors: Kehl, Theodore H.; Burns, Steven M.;, Assignee: University of Washington (Seattle, WA) |
Voltage to current conversion circuit for converting voltage to multiple current outputs
It is an object of the present invention to provide a voltage to current conversion circuit which converts the absolute value of an input voltage to a current and enables to obtain a plurality of curr... Read More
Inventors: Nishimura, Kouichi;, Assignee: NEC Corporation (Tokyo, JP) |
Static clock generator
To overcome the limitations of the prior art described above, and to overcome other limitations that will become apparent upon reading and understanding the present specification, the present inventio... Read More
Inventors: McDermott, Mark W.;, Assignee: Cyrix Corporation (Richardson, TX) |
Integrated circuit binary data output interface for multiplexed output of internal binary information elements from input/output pads
FIG. 1 shows an integrated circuit comprising an interface according to the invention. Conventionally, the circuit 1 shown comprises two pads 2 and 3 to receive a supply potential VCC and a reference... Read More
Inventors: Klingler, Stephan;, Assignee: SGS-Thomson Microelectronics, S.A. (Saint Genis, FR) |
Field programmable gate array with mask programmable I/O drivers
FIG. 2 is a block diagram of a configurable logic block (CLB) 200 in accordance with one embodiment of the invention. CLB 200 includes programmable interconnect resources 201, field programmable conf... Read More
Inventors: New, Bernard J.;, Assignee: Xilinx, Inc. (San Jose, CA) |
Flip-flop circuit and electronic device including the flip-flop circuit
It is an object of this invention to provide a flip-flop circuit. The flip-flop circuit includes a dynamic circuit which is operable also in a low-frequency cycle. A delay time, a setup time, and a ho... Read More
Inventors: Kubota, Katsuhisa; Nakamura, Kenji;, Assignee: Fujitsu Limited (Kawasaki, JP) |
Pulse-to-static conversion latch with a self-timed control circuit
It is therefore an object of the present invention to provide circuit techniques for interfacing dynamic and static circuits via a latch. It is another object of the invention to provide self-timed cl... Read More
Inventors: Chappell, Terry Ivan; Henkels, Walter Harvey; Hwang, Wei; Joshi, Rajiv Vasant;, Assignee: International Business Machines Corporation (Armonk, NY) |
Split-slave dual-path D flip flop
This invention is a D flip-flop circuit. Two independent paths drive the output signal of this flip-flop. In a first embodiment a push-pull circuit includes an inverter having an input connected to th... Read More
Inventors: Hill, Anthony M.; Ko, Uming;, Assignee: Texas Instruments Incorporated (Dallas, TX) |
Pulse generator
OF THE INVENTION Reference will now be made in detail to the presently preferred embodiments of the invention as illustrated in the accompanying drawings, in which like reference numerals designate l... Read More
Inventors: Otani, Akihito; Otsubo, Toshinobu;, Assignee: Anritsu Corporation (Tokyo, JP) |
Data flow processor which combines packets having same identification and destination and synchronizes loop variables for detecting processing loop termination
An object of the present invention is to provide an execution control system of a data flow program which can eliminate the above described problems and which has a high efficiency of a program execut... Read More
Inventors: Yoshida, Shinichi;, Assignee: Sharp Kabushiki Kaisha (Osaka, JP) |
Method and apparatus for real time compression and decompression of a digital motion video signal using a fixed Huffman table
A method and apparatus for real time compression and decompression of a digital motion video signal is disclosed. According to the present invention, a bitstream representative of at least one digital... Read More
Inventors: Keith, Michael;, Assignee: Intel Corporation (Santa Clara, CA) |
Method and apparatus for encoding/decoding image data
OF THE PREFERRED EMBODIMENT The present invention relates to a method and apparatus for video encoding/decoding. In the following description, for the purposes of explanation, specific values, signal... Read More
Inventors: Normile, James O.; Yeh, Chia L.; Wright, Daniel W.; Chu, Ke-Chiang;, Assignee: Apple Computer, Inc. (Cupertino, CA) |
System and method for communicating information to and from a single chip computer system through an external communication port with translation circuitry
The invention provides a computer system including a microprocessor on a single integrated circuit chip comprising an on-chip CPU with a plurality of registers, a communication bus providing a paralle... Read More
Inventors: Jones, Andrew Michael; May, Michael David;, Assignee: STMicroelectronics Limited (Bristol, GB) |
Semiconductor integrated circuits with power reduction mechanism
The present invention relates to semiconductor integrated circuits suitable for high-speed and low-power operation, and particularly to a semiconductor integrated circuit formed of small-geometry MOS ... Read More
Inventors: Sakata, Takeshi; Itoh, Kiyoo; Horiguchi, Masashi;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
Semiconductor integrated circuit device having power reduction mechanism
It is an object of the present invention to provide a semiconductor integrated circuit capable of operating at high speed and with low power consumption even when the size of MOS transistors is scaled... Read More
Inventors: Horiguchi, Masashi; Uchiyama, Kunio; Itoh, Kiyoo; Sakata, Takeshi; Aoki, Masakazu; Kawahara, Takayuki;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
Semiconductor integrated circuit device having a hierarchical power source configuration
It is therefore an object of the present invention to provide a semiconductor integrated circuit device which can be operated stably and at high speed with low current consumption even in the case of ... Read More
Inventors: Ooishi, Tsukasa;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) |
Semiconductor integrated circuit device in which influence of power supply noise on internal circuitry during operation of input/output buffer is prevented
An object of the present invention is to provide semiconductor integrated circuit device in which influence of power supply noise to internal circuitry when a buffer circuit is in operation is reduced... Read More
Inventors: Tsuruda, Takahiro; Arimoto, Kazutami;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) |
Refresh method capable of reducing memory cell access time in semiconductor memory device
Therefore, an object of the present invention is to provide a refresh method for a semiconductor memory device capable of reducing memory cell access time and performing refresh operation normally. An... Read More
Inventors: Jo, Seong-kue; Park, Jong-yul;, Assignee: Samsung Electronics Co., Ltd. (Suwon, KR) |
Food pouch with integral collar
In order to overcome the limitation and economic drawbacks encountered in the manufacture of flexible pouches of the type described hereinabove, the present invention contemplates a method in which tw... Read More
Inventors: Barton, Lewis;, Assignee: |
Apparatus for evaluating a polynomial function using an array of optical modules
I claim: 1. Apparatus for providing an optical analog intensity that is approximately proportional to the value of a polynomial function expressible in the form ##STR4## wherein p(x) is a function of ... Read More
Inventors: Verber, Carl M.;, Assignee: Battelle Development Corporation (Columbus, OH) |
Method and apparatus for detecting a binary convoluted coded signal
Matched filters for detecting signals of known wave-shape are extensively used in sounding or ranging systems. The present invention is a matched filter for use in a system in which the known wave-sha... Read More
Inventors: Venier, Gerald O.;, Assignee: Her Majesty the Queen in right of Canada (Ottawa, CA) |
Bus control method and apparatus
An object of the present invention is to provide a bus control method and apparatus which, in order to eliminate these disadvantages of the prior art, dispenses with a bus arbiter for controlling the ... Read More
Inventors: Yabushita, Masaharu; Nohmi, Makoto; Fujikura, Nobuyuki; Miyamoto, Shoji; Ihara, Hirokazu;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
Method of automatically extracting a contrasting object in a digital image
What is claimed is: 1. A method for extracting a contrasting object in a digital image comprising: estimating for each picture element (i,j) a threshold S.sub.1 corresponding to a background estimatio... Read More
Inventors: Herby, Gerard; Legall, Serge;, Assignee: U.S. Philips Corporation (New York, NY) |
Computer memory apparatus
The above and other objects are achieved in a preferred embodiment of the memory subsystem of the present invention which couples to a bus in common with a central processing unit and processes memory... Read More
Inventors: Ng, Alvan W.; Fisher, Edwin P.;, Assignee: Honeywell Information Systems Inc. (Waltham, MA) |
Electro-optic binary adder
What is claimed is: 1. An electro-optic adder for summing binary addends having N bits comprising: an electrically non-conductive substrate; N + 1 optical waveguides supported by said substrate, said ... Read More
Inventors: Taylor, Henry F.;, Assignee: The United States of America as represented by the Secretary of the Navy (Washington, DC) |
Resolution conversion of bitmap images using error term averaging
OF AN ILLUSTRATIVE EMBODIMENT In FIG. 1, an image conversion system is shown having an image converter 10 for converting an image in an input bitmap 12 to an image in an output bitmap 14. The image c... Read More
Inventors: Irwin, Kathleen;, Assignee: Wang Laboratories, Inc. (Lowell, MA) |
***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST*** *** NO IMAGES AVAILABLE***
Description:... Read More
Inventors: , Assignee: |
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