Router device and data communication system capable of suppressing traffic increase in communications among a plurality of lan segments
An object of the present invention is to provide a router device and a data communication system which, in communications among a plurality of LAN segments in connection, suppress traffic increase at ... Read More
Inventors: Saito, Shuichi;, Assignee: NEC Corporation (Tokyo, JP) |
Bus adapter module with improved error recovery in a multibus computer system
It is an object of the present invention to provide a method and apparatus for error recovery in a multibus computer system that maintains system integrity while providing higher system reliability th... Read More
Inventors: Hartwell, David W.; Bloom, Elbert; Triolo, Victoria M.;, Assignee: Digital Equipment Corporation (Maynard, MA) |
Error correction circuit
An error correction circuit of a first aspect of the invention comprises (a) a data buffer for storing a data stream in which a plurality of RS codes for correcting: an error in data and CRC codes for... Read More
Inventors: Kodama, Yukio; Murakami, Kazuo; Yoshida, Hideo;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) |
Virtual machine data processor
Accordingly, it is an object of the present invention to provide a data processor which can support a virtual machine environment wherein a faulted instruction may be suspended while the cause of the ... Read More
Inventors: Mills, Jr., Marvin A.; Moyer, William C.; MacGregor, Douglas B.; Zolnowsky, John E.;, Assignee: Motorola, Inc. (Schaumburg, IL) |
Distributed processing system with checkpoint restart facilities wherein checkpoint data is updated only if all processors were able to collect new checkpoint data
It is therefore an object of the present invention to provide a distributed processing system with checkpoint restart facilities which allows each of a number of data processors comprising the system ... Read More
Inventors: Sugano, Hiroshi;, Assignee: Kabushiki Kaisha Toshiba (Kawasaki, JP) |
Management method for a multiprocessor system
It is an object of the present invention to solve the above problems. The present invention provides a multiprocessor system including at least one supervisor to which a plurality of instruction proce... Read More
Inventors: Koguchi, Yukio; Suzuki, Nobuyuki; Hayashi, Toyojiro;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
CMOS output buffer circuit with improved ground bounce
Accordingly, it is a general object of the present invention to provide a CMOS output buffer circuit with a significant reduction in ground bounce which is relatively simple and economical to manufact... Read More
Inventors: Naghshineh, Kianoosh;, Assignee: |
Selectable edge rate CMOS output buffer circuit
I claim: 1. A CMOS tristate output buffer circuit having an output pullup driver (P1) and an output pulldown driver (N1) coupled to an output (V.sub.OUT), a pullup predriver stage (P2, N2) coupled to ... Read More
Inventors: Boomer, James B.;, Assignee: National Semiconductor Corporation (Santa Clara, CA) |
State machine for executing commands within a minimum number of cycles by accomodating unforseen time dependency according to status signals received from different functional sections
The above and other objects of the present invention are achieved in a preferred embodiment of a unit which includes a state machine for defining sequential states used in generating control signals f... Read More
Inventors: Lemay, Richard A.; Tague, Steven A.; Woods, William E.;, Assignee: Bull HN Information Systems Inc. (Billerica, MA) |
Software controlled power shutdown in an integrated circuit
An object of the invention is control of power shutdown within an integrated circuit without the use of dedicated package pins. A feature of the invention is the use of software to control power down ... Read More
Inventors: Lum, Sammy S.; Rempfer, William C.;, Assignee: Linear Technology Corporation (Palo Alto, CA) |
Integrated circuit with a low-power mode and clock amplifier circuit for same
Accordingly, there is provided, in one form, an integrated circuit with a low-power mode, comprising an inverter portion, a resistor, a logic portion, and an internal circuit. The inverter portion rec... Read More
Inventors: Shankar, Ravi; Chau-Lee, Kin K.; Hoang, Phil P. D.;, Assignee: Motorola, Inc. (Schaumburg, IL) |
Low power clocking apparatus and method
A low power clocking apparatus and method is used to reduce power consumption by an electronic system or an integrated circuit that is coupled to an external system via a system bus which is configure... Read More
Inventors: Smith, Stephen A.; Richter, Bryan; Singhal, Dave M.;, Assignee: Cirrus Logic, Inc. (Freemont, CA) |
On chip monitor
Having thus described our invention, what we claim as new, and desire to secure by Letters Patent is: 1. In an integrated digital logic circuit chip having an LSSD serial input line, an LSSD serial ou... Read More
Inventors: Mercy, Brian R.;, Assignee: IBM Corporation (Armonk, NY) |
Parallel data transmission unit using byte error correcting code
An object of the invention, therefore, is to overcome the problems existing in the prior art and to provide a parallel data transmission unit in which an error correcting code is used and which enable... Read More
Inventors: Suemura, Yoshihiko; Henmi, Naoya;, Assignee: NEC Corporation (JP) |
Semiconductor memory device with redundancy structure suppressing power consumption
OF THE PRESENT INVENTION Referring to FIG. 2, the difference between the structure of FIGS. 1 and 2 is located in fuses. Fuses A and B, serving as cutting means, are connected between the power volta... Read More
Inventors: Kwak, Choong-Keun; Lee, Seung-Keun;, Assignee: Samsung Electronics Co., Ltd. (Kyungki-do, KR) |
Control circuit and method for controlling a data line switching circuit in a semiconductor memory device
Accordingly, it is an object of the present invention to provide a semiconductor memory device including a control circuit for controlling a data line switching circuit having a stable data output cha... Read More
Inventors: Cho, Ho-Yeol;, Assignee: Samsung Electronics Co., Ltd. (KR) |
Scan path circuitry including a programmable delay circuit
In one embodiment, the present invention concerns a circuit for delaying a signal. The circuit includes a scan register, a logic circuit, and a programmable delay circuit. The scan register stores sca... Read More
Inventors: Churchill, Jonathan F.; Raftery, Neil P.; Hendry, Colin J.; Shanmugam, Jeyakumar; Finn, Mark A.; Surrette, Thomas M.; Phelan, Cathal G.; Pancholy, Ashish;, Assignee: Cypress Semiconductor Corp. (San Jose, CA) |
Apparatus and method for enhancing data transfer to or from a SDRAM system
The problems outlined above are in large part solved by an improved memory bus transfer technique hereof. The present transfer technique is one which can perform three of more consecutive and unbroken... Read More
Inventors: Reeves, Earl C.;, Assignee: Compaq Computer Corp. (Houston, TX) |
Single-chip microcomputer
The present invention relates to construction of a logic device (a random logic circuit), within the microprocessor, and to allowing the user to establish the logical functions of the logic device in ... Read More
Inventors: Sawase, Terumi; Noguchi, Kouki; Nakamura, Hideo; Akao, Yasushi; Baba, Shiro; Hagiwara, Yoshimune;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
Self-timed interface for a network of computer processors interconnected in parallel
An object of this invention is the provision of a cost effective bus data transfer system that can operate at high data transfer rates without tight control of the bus length, and without system clock... Read More
Inventors: Garmire, Derrick Leroy; Capowski, Robert Stanley; Casper, Daniel Francis; Desnoyers, Christine Marie; Ferraiolo, Frank David; Halma, Marten Jan; Stucke, Robert Frederick;, Assignee: International Business Machines Corporation (Armonk, NY) |
Semiconductor integrated circuits with power reduction mechanism
The present invention relates to semiconductor integrated circuits suitable for high-speed and low-power operation, and particularly to a semiconductor integrated circuit formed of small-geometry MOS ... Read More
Inventors: Sakata, Takeshi; Itoh, Kiyoo; Horiguchi, Masashi;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
Testing integrated circuits provided on a carrier
OF THE PREFERRED EMBODIMENTS Description of an integrated circuit. FIG. 1 is a block diagram of an integrated circuit embodying the principle of the invention. The envelope is denoted by the block 20... Read More
Inventors: Sauerwald, Wilhelm A.; De Jong, Franciscus G. M.;, Assignee: U.S. Philips Corporation (New York, NY) |
Method and device for depuncturing data
The present invention relates in general to a method and device for depuncturing data in the receiver circuitry of a digital communications system. The method and device of the present invention provi... Read More
Inventors: Laskowski, Paul J.;, Assignee: Hughes Electronics (Los Angeles, CA) |
Method and apparatus for the generation of simple burst error correcting cyclic codes for use in burst error trapping decoders
OF THE INVENTION Basic concepts and operations according to preferred embodiments of the present invention will be described below in more detail with reference to the accompanying drawings. First of... Read More
Inventors: Metzner, John J.; Cha, Young-tae;, Assignee: Samsung Electronics Co., Ltd. (Kyungki-do, KR); Metzner; John J. (University Park, PA); Cha; Young-Tae (Kyungki-do, KR) |
Indicator apparatus for indicating notes emitted by means of a musical instrument
I claim: 1. Apparatus for indicating the presence of musical notes and for identifying the musical notes detected comprising: means for amplifying input signals corresponding to musical notes to be id... Read More
Inventors: Roses, Henri;, Assignee: |
Vacuum power servo booster
In accordance with these objects, a vacuum power servo booster is provided in which, according to the invention, a retainer for an annular seat extending from the control valve body is improved in suc... Read More
Inventors: Kobayashi, Michio; Tsuyuki, Yasuo;, Assignee: Jidosha Kiki Company, Limited (JP) |
Variable impedance detecting circuit for a telephone line auxiliary device
Briefly, and in accordance with the present invention, the above drawbacks and disadvantages attendant with the prior art are overcome by providing an automatic telephone answering device which includ... Read More
Inventors: Ando, Shizuo; Mizuno, Hiroshi;, Assignee: Pioneer Electronic Corporation (Tokyo, JA) |
Microprocessor having program counter registers for its coprocessors
The basic idea is that when an exception occurs in the coprocessor (CP) there has to be a way to identify the program counter (PC) value of the instruction that took the exception. Generally, the copr... Read More
Inventors: Yoshida, Toyohiko;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Todyo, JP) |
Digital programmable timing device
What is claimed is: 1. A system for synchronizing analog data from a rotating device having a plurality of blades with the rotation of said rotating device which comprises: (a) means for generating a ... Read More
Inventors: West, Jr., James C.; Shreeve, Raymond P.;, Assignee: The United States of America as represented by the Secretary of the Navy (Washington, DC) |
Character information processing system
An object of the present invention is to provide a novel character recognition system. In the system according to the present invention, no host computer is required and dictionaries are respectively ... Read More
Inventors: Miyake, Toshie; Suzuki, Akio;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
CPUs 
