Multiple site, differential displacement, surface contacting assembly |
| What is claimed is: 1. A multiple site surface contacting assembly comprising in combination: a ... |
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Multi-purpose telephone holder apparatus |
| OF THE INVENTION Referring to FIG. 1, there is shown a tray member 10. As will be explained, the ... |
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Support for a one-piece telephone |
| According to the present invention, there is provided a support for a one-piece telephone, ... |
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Adapter for protective mask for a helmet |
| I claim: 1. An adapter in combination with a fastening strap and a protective mask for a helmet ... |
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Retransmission control method and the apparatus |
| An object of the present invention is to provide an effective retransmission control method and an ... |
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Electronic component operating with acoustic waves |
| I claim: 1. An electronic component operating with acoustic waves, comprising: a substrate; at ... |
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Doppler radar clutter spike rejector |
| What is claimed is: 1. A doppler radar system for processing the received signal from a radar ... |
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System and method for transmitting information signals |
| What is claimed is: 1. A method for communicating information comprising the steps of: a. encoding ... |
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Signal acquisition using data bit information |
| Techniques are provided for aiding in acquiring a signal using the data bit information that is ... |
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Apparatus for 3B-2T code conversion
| Details |
Inventors: Iketani, Akira;
Assignee: Matsushita Electric Industrial Co., Ltd. (Kadoma, JP)
Primary Examiner: Shoop, Jr.; William M.
Assistant Examiner: Blum; Richard K.
Attorney, Agent or Firm: Cushman, Darby & Cushman
An apparatus converting three bits of binary data (B.sub.1, B.sub.2, B.sub.3) into two ternary symbols (T.sub.1, T.sub.2), in which even numbered pars of the ternary symbols (T.sub.1, T.sub.2), where (T1=T2), are replaced by a pair of ternary symbols (T'.sub.1, T'.sub.2) which do not correspond to any of the three bits of binary data (B.sub.1, B.sub.2, B.sub.3). The replacement occurs when the respective symbols in a respective pair of ternary symbols (T.sub.1, T.sub.2) are in the same ternary level; hence, a run-length of the same symbol can be restricted to four or less. Furthermore, the digital sum variation (DSV) is controlled in every synchronous block which is composed by the above-mentioned replaced output, thereby allowing a 3B-2T code which does not contain a DC component to be obtained. Moreover, inversion or noninversion of the synchronous pattern can be easily determined by distinguishing whether control of the DSV is applied or not to the synchronous block. |
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DETAILED DESCRIPTION An object of the present invention is to provide a 3B-2T code which is suitable for high density recording and which overcomes the above-noted drawbacks of the prior art. An apparatus for 3B-2T code conversion for converting three binary data bits (B. sub. 1, B. sub. 2, B. sub. 3) to two ternary symbols (T. sub. 1, T. sub. 2) in accordance with the present invention additionally comprises: detecting means for detecting a state wherein continuous occurrence of the same symbol exceeds four, and replacing means for replacing an even numbered pair of ternary symbols (T. sub. 1, T. sub. 2, where T. sub. 1 =T. sub. 2), to ternary symbols (T'. sub. 1, T'. sub. 2) which do not correspond to any of said three binary data bits (B. sub. 1, B. sub. 2, B. sub. 3) detected by said detecting means. As a result, a run-length of the same symbols is limited to four and below, and a 3B-2T code which is superior in clock recovery ability is realized.
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