CDMA synchronous acquisition circuit

DETAILED DESCRIPTION The present invention has been implemented to overcome the above problems of the prior art, and has an object to provide a CDMA synchronous acquisition circuit which can surely remove DC offset components contained in a base band signal to obtain an accurate correlation value level, prevent failure of detection of the maximum value of the correlation value and detect an accurate spread code generation timing.
In order to attain the above object, according to the present invention, a CDMA synchronous acquisition circuit for receiving a CDMA signal and performing synchronous acquisition on the CDMA signal, comprises a receiving unit for receiving a signal and decoding the received signal to a reception base band signal which is spread-modulated in a CDMA mode, a correlation circuit for calculating a correlation value for the received base band signal every timing within one chip of a spread code by a correlator, and means for detecting the maximum value of the correlation value to estimate the spread code generation timing of a spread-modulated transmission base band signal within a precision of one chip of the spread code, wherein the correlator includes offset removing means for removing a DC offset component due to unbalance of the code balance of the spread code.
Further, the offset removing means may include measuring means for measuring the code balance of the spread code, first multiplying means for multiplying the measurement result and the output signal after the calculation of the correlation value, a low-pass filter for removing high frequency components of the multiplication output, second multiplying means for multiplying the removed output and the measurement result, and means for reducing the multiplication output from the output signal after the calculation of the correlation value.
The measuring means may include first and second counters for counting a positive code and a negative code of a spread code in synchronism with the clock corresponding to the chip rate of the spread code, and a subtraction circuit for outputting the difference between the count values of the first and second counters every symbol of the spread code to set the subtraction result is set as a measurement result