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| Differential global positioning system using almanac data for a fast time to first fix |
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Differential amplifier circuit having controllable gain
| Details |
Inventors: Fenk, Josef;
Assignee: Siemens Aktiengesellschaft (Berlin and Munich, DE)
Primary Examiner: LaRoche; Eugene R.
Assistant Examiner: Mottola; Steven J.
Attorney, Agent or Firm: Lerner; Herbert L., Greenberg; Laurence A.
A differential amplifier circuit includes a first differential amplifier stage formed of a pair of transistors having inputs and output circuits, the inputs of the transistor pair of the first differential amplifier stage forming an input of the amplifier circuit, load resistors having circuits connected to the output circuits of the pair of transistors of the first differential amplifier stage, a circuit output connected to the load resistors, at least two further differential amplifier stages having first and second circuits, a reference input connected to the first circuit of the further differential amplifier stages, a gain control input connected to the second circuit of the further differential amplifier stages, at least the first circuit of the further differential amplifier stages being connected to the output circuits of the pair of transistors of the first differential amplifier stage, the second circuit of the further differential amplifier stages driving the load resistor circuits, and a control stage connected to the load resistor circuits for maintaining a constant d-c voltage level in the circuit output. |
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DETAILED DESCRIPTION I claim: 1.
Differential amplifier circuit, comprising a first differential amplifier stage formed of a pair of transistors having inputs and output circuits, said inputs of said transistor pair of said first differential amplifier stage forming an input of the amplifier circuit, load resistors having circuits connected to said output circuits of said pair of transistors of said first differential amplifier stage, a circuit output connected to said load resistors, at least two further differential amplifier stages having first and second circuits, a reference input connected to said first circuits of said further differential amplifier stages, a gain control input connected to said second circuits of said further differential amplifier stages, at least said first circuits of said further differential amplifier stages being connected to said output circuits of said pair of transistors of said first differential amplifier stage, said second circuits of said further differential amplifier stages driving a control stage connected to said load resistor circuits for maintaining a constant d-c voltage level in said circuit output.
2.
Differential amplifier circuit according to claim 1, wherein said pair of transistors of said first differential amplifier stage have emitter electrodes connected to each other, said further differential amplifier stages have a common transistor connected to said reference input and to said interconnected emitter electrodes of said pair of transistors of said first differential amplifier stage, and said further differential amplifier stages have further two transistors connected to said gain control input.
3.
Differential amplifier circuit according to claim 1, wherein said further differential amplifier stages have transistors being connected to said gain control input and having output circuits, said control stage includes two control transistor branches and two resistance branches, said control transistor branches including control transistors each having an output circuit connected to a circuit of a respective one of said load resistors and each having an input, said resistance branches including resistors each being connected to a junction point connected to said output circuit of a respective one of said transistors of said further differential amplifier stages connected to said gain control input and to a respective one of said inputs of said control transistors
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Cell Phones 
