System and method for obtaining synchronization to a digital frame

DETAILED DESCRIPTION What is claimed is: 1.
In a digital signal system in which digital signals are received in frames of M digital bits and in which each frame contains a specified sync code of N bits, a method for determining whether the system has synchronized to the framing of the digital signals comprising the steps of: (1) receiving a serial stream of digital bits; (2) converting said received stream into a parallel form having N bits; (3) for each received digital bit, comparing the parallel form of N bits for a match with the specified sync code; (4) if a match is not found in the comparison, go to step (3); (5) if a match is found in the most recent comparison, (a) setting a counter to locate the next expected occurrence of said sync code within the serial stream; (b) incrementing a confidence counter by 1; (c) if the confidence counter reaches a specified threshold, indicating that sync has been established; (d) at the next expected occurrence of said sync code within the serial stream, comparing the parallel form of the N bits at that time for a match with the specified sync code; (e) go to step (5); (6) if no match is found in the most recent comparison, (a) setting a counter to locate the next expected occurrence of said sync code within the serial stream; (b) decrementing the confidence counter by 1; (c) if the confidence counter falls to a second specified threshold, indicating that sync is not established and returning to step (3); (d) go to step (5).
2.
A frame sync detection circuit for digital televisions systems in which digital television signals are received which comprise sequential digital words including a word designating a frame signal, the frame sync detection circuit comprising: a sync word detection circuit for monitoring the digital television signals and providing a frame signal output when a word corresponding to the frame signal is detected; a sync confidence counter circuit for receiving the frame signal output from the sync word detection circuit, and is adapted to, when enabled, to be incremented by the receipt of the frame signal and decremented by the absence of the frame signal, the sync confidence counter circuit providing a sync lock signal when a preset count is reached, and a frame counter circuit for receiving the digital television signals and providing an enable signal to the sync confidence counter circuit when a frame count is reached