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Details
Inventors: Lee, Sherman; Chou, Vivian Y.; Lin, John H.;
Assignee: Broadcom Corporation (Irvine, CA)
Primary Examiner: Nguyen; Lee
Assistant Examiner:
Attorney, Agent or Firm: Christie, Parker & Hale, LLP

A wireless (radio) receiver receives RF signals carrying data synchronized with a first clock. The wireless receiver demodulates the RF signals to extract the data signals and the first clock signals. The wireless receiver uses the first clock signals as write signals to write the data signals in a first-in first-out memory device (FIFO). The data signals stored in the FIFO may be read out with read signals synchronized to a second clock. In one example, a host associated with the wireless receiver reads out data signals stored in the FIFO with read signals synchronized to the system clock of the host receiver. In another example, the wireless receiver includes a data processing circuit (e.g., including forward error correction, de-whitening, and cyclical redundancy check circuits) that reads out data signals stored in the FIFO with read signals synchronized to the system clock of the wireless receiver. A microprocessor system architecture is disclosed which allows for the selective execution of programmed ROM microcode or, alternatively, RAM microcode if there has been a correction or update made to the ROM microcode originally programmed into the system. Patched or updated RAM microcode is utilized or executed only to the extent of changes to the ROM microcode, otherwise the ROM microcode is executed in its normal fashion. When a patch is received, it is loaded into system RAM along with instructions or other appropriate signals to direct the execution of the patched or updated microcode from RAM instead of the existing ROM microcode. Various methods are presented for selecting the execution of the appropriate microcode depending upon whether there have been changes made to it.

DETAILED DESCRIPTION A wireless network 100 (FIG.
1) includes a plurality of wireless devices 102-1, 102-2 .
.
.
102-i .
.
.
102-n (2.
ltoreq.
i .
ltoreq.
n).
Wireless network 100 includes radio frequency (RF) networks, optical networks, and infrared networks.
Wireless network 100 is, for example, a Bluetooth piconet where wireless device 102-1 is a master Bluetooth radio and wireless devices 102-2 to 102-n are slave Bluetooth radios.
As one skilled in the art understands, a Bluetooth piconet can form part of a larger Bluetooth scatternet.
In accordance with one aspect of the invention hereafter referred to as "thin baseband/host-based", wireless device 102-i (FIG.
2A) performs radio and baseband modulation functions in circuitry.
A host 220 performs all other baseband, link management, and protocol stack functions through software.
Host 220 includes a high performance and low latency host processor (e.
g.
, reduced instruction-set computing processors) capable of handling time-critical link management functions.
Such processors are available from ARM Ltd.
of Cambridge, England, MIPS Technologies, Inc.
of Mountain View, ARC Cores, Inc.
of San Jose, and Tensillica of Santa Clara.
Wireless device 102-i includes in one embodiment a conventional radio frequency (RF) receiver 202 (FIG.
2A) that receives RF signals from another Bluetooth radio via an antenna 204.
The RF signals carry data synchronized to the clock ("external clock") of the another Bluetooth radio.
RF receiver 202 decodes the RF signals to recover the data signals and the external clock signals (symbol timing recovery).
RF receiver 202 respectively outputs the data signals and the external clock signals via respective lines 206 and 208.
Lines 206 and 208 are respectively coupled to input terminals 210 and 212 of a conventional first-in first-out memory device (FIFO) 214.
FIFO 214 receives the external clock signals ("recovered clock signals") as write signals from RF receiver 202.
When FIFO 214 receives an active recovered clock signal on terminal 212, FIFO 214 writes the data signal received on terminal 210 from RF receiver 202 into one of its empty memory locations indicated by a write pointer



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