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Home Coded Analog-to-digital-converter-for-both-m-bit-and-n-bit-analog-conversion

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 Analog-to-digital converter for both m-bit and n-bit analog conversion

Details
Inventors: Shimomura, Takehiko; Abe, Nobusuke;
Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP)
Primary Examiner: Williams; Howard L.
Assistant Examiner: JeanPierre; Peguy
Attorney, Agent or Firm: Burns, Doane, Swecker & Mathis, LLP

There is provided an analog-to-digital converter comprising a first data register (4) for storing an m-bit analog-to-digital conversion result, a second data register (5) for storing an n-bit (n is smaller than m) analog-to-digital conversion result, and an analog-to-digital conversion control circuit (3) for transferring the n (n is smaller than m) highmost bits of the m-bit analog-to-digital conversion result stored in the first data register (4) as an n-bit analog-to-digital conversion result to the second data register (5).

DETAILED DESCRIPTION The present invention is made to overcome the problems.
It is therefore an object of the present invention to provide an m-bit A/D converter which can convert analog input signals into both m-bit digital signals and n-bit (n is smaller than m) digital signals.
In accordance with one aspect of the present invention, there is provided an analog-to-digital converter comprising a first data register for storing an m-bit analog-to-digital conversion result, a second data register for storing an n-bit (n is smaller than m) analog-to-digital conversion result, and an A/D conversion control circuit for transferring the n (n is smaller than m) highmost or lowermost bits of the m-bit analog-to-digital conversion result stored in the first data register as an n-bit analog-to-digital conversion result to the second data register.
Preferably, the n-bit analog-to-digital conversion result can be mapped into the second data register in such a manner that the n-bit analog-to-digital conversion result is stored in half-word units.
Alternatively, the n-bit analog-to-digital conversion result can be mapped into the second data register in such a manner that the n-bit analog-to-digital conversion result is stored in byte units.
In accordance with another aspect of the present invention, there is provided an analog-to-digital converter comprising a data register for storing an m-bit analog-to-digital conversion result, and a shifter being responsive to a first control signal applied thereto, for reading the m-bit analog-to-digital conversion result from the data register and then sending out the m-bit analog-to-digital conversion result, just as it is, and being responsive to a second control signal applied thereto, for reading the m-bit analog-to-digital conversion result from the data register and extracting the n (n is smaller than m) highmost or lowermost bits of the m-bit analog-to-digital conversion result, and then sending out the n-bit highmost or lowermost bits as an n-bit analog-to-digital conversion result



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