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Details
Inventors: Hanna, John Edward;
Assignee: Motorola, Inc. (Schaumburg, IL)
Primary Examiner: Hoff; Marc S.
Assistant Examiner: JeanPierre; Peguy
Attorney, Agent or Firm: Parker; Lanny L.

A high precision DAC (10) incorporates a low precision DAC (18) and current sources (15(A)-15(O)) whose full-scale currents are adjusted to match a reference current generated by an analog calibration circuit (28). An additional low precision DAC (20) and another current source (16) are spares that allow periodic calibration of the high precision DAC (10) to occur in the background without taking the high precision DAC (10) off-line or out of service. A thermometer code generated by a thermometer code circuit (12) is used by a thermometer mapper circuit (13) to enable the most recently calibrated current sources to generate currents having the highest probability for use by the high precision DAC (10).

DETAILED DESCRIPTION OF THE DRAWINGS Generally, the present invention provides a method for improving Digital-to-Analog Converter (DAC) linearity by incorporating multiple DACs and current sources whose full-scale output currents are periodically readjusted to match a reference current.
Composite high precision DAC 10 includes a primary DAC conversion circuit 11 and a spare DAC circuit 14.
Spare DAC circuit 14 includes an auxiliary low precision DAC 20 and a current source 16 that allow periodic calibration of composite high precision DAC 10 without taking it off-line or out of service.
In other words, a single low precision DAC 20 and a single spare current source 16 are more than the minimum number of DACs and current sources needed to provide the functionality of composite high precision DAC 10.
Thus, low precision DAC 20 is an auxiliary or "spare" DAC, and current source 16 is a "spare" current source that substantially maintains current values between times for calibration.
Both low precision DAC 20 and current source 16 are calibrated while off-line.
Following calibration, the recently calibrated auxiliary low precision DAC 20 and spare current source 16 are selected to generate current for composite high precision DAC 10.
By auxiliary low precision DAC 20 and spare current source 16 contributing a portion of the total current generated by DAC 10, the accuracy of composite high precision DAC 10 is improved.
FIG.
1 is a block diagram of a composite high precision DAC 10 having an input port 19 and an output terminal 24 in accordance with the present invention.
Input port 19 is connected to a data bus that transmits a digital data stream of binary data having most significant bits and least significant bits.
Composite high precision DAC 10 includes a reference current generator 26 having an output for supplying a reference current I.
sub.
SEG.
The output of reference current generator 26 is connected to a first input of an analog calibration circuit 28.
Composite high precision DAC 10 further includes a primary DAC conversion circuit 11 having a plurality of inputs and a plurality of outputs



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