Communication interface for interfacing a data bus of a computer to a high speed bipolar communication system

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG.
1, to which reference should now be made, is a block diagram of a digital data system that is interconnected to provide digital service such as that defined in the "Bell System Technical Reference" entitled Digital Data System Channel Interface Specification", Dated September 1983 and noted as Bell System publication 62310 and "AT&T Technical Reference" entitled Special Access Connections to the AT&T Communications Network for New Service Applications', dated October 1985 and noted as AT&T publication 4145A.
A plurality of terminals 1 through N are connected via data lines 16 and 18 to a local central offices LCO's 3, 11 and 13 respectively.
Each local central office 3, 11 and 13 is connected to a network Action Control Point (ACP) 5, 9 and 15 respectively.
The network action control points 5, 9 and 15 are connected to a switch digital network 7, which provides switched connectors for connecting each terminal 10 to a called terminal that is a member of the plurality of terminals 1 through N.
Each terminal 10 in the preferred embodiment is a device such as a Personal computer that is MS-DOS driven, MS-DOS refers to an operating system provided by Microsoft Corp.
Each terminal 10 interfaces to local central office 3, 11 or 13 via a receive line 16 and a transmit line 18.
There are two types of data transmitted over the receive line 16 and transmit line 18.
FIG.
2A represents how time discrete digital data in a bipolar format without violation is transmitted, in particular, logic ones are transmitted at time spaces 2, 8, 10 14, 20 and 22.
Logic zeros are transmitted at 4,6, 12 and 24.
FIG.
2B illustrates a violation indication during the transmission of the discrete digital data in a bipolar format as specified in the AT&T publication 62310.
The violation indication is used for transmitting control sequences between terminals 10.
A control sequence is defined as violation sequence, V, in which as an example a logic 1 will occur in the positive direction or in the same direction as the preceding logic one