DC to DC switching regulator with temperature compensated isolated feedback circuitry

DETAILED DESCRIPTION OF THE INVENTION Referring now to the FIGURE, there is shown a schematic diagram of the present invention.
An unregulated DC terminal 10 and an input ground terminal 12 are provided for receiving an unregulated DC input voltage.
The circuit in the FIGURE outputs a regulated DC voltage across a positive output terminal 14 and an output ground terminal 16.
The unregulated DC on the input and the regulated DC on the output are isolated by a transformer 18.
The transformer 18 has a center tapped primary winding 20, a center tapped high voltage secondary winding 22 and a center tapped low voltage secondary winding 24.
The secondary winding 22 provides the regulated DC output while the secondary winding 24 provides power for the feedback circuitry as will be described below.
It should be understood that the feedback circuitry can derive its power from the secondary winding 22 with the use of some additional circuitry.
A pulse width modulation circuit (PWM) 26 converts a DC voltage to a series of variable width pulses.
The PWM 26 has a voltage input V.
sub.
IN connected to the unregulated DC terminal 10 and a ground input (GND) connected to the input ground terminal 12.
The PWM 26 has an internal regulator (not shown) that regulates the voltage input to terminal 10 to a predetermined voltage and outputs this regulated voltage from a voltage reference output V.
sub.
R on a node 32.
The PWM 26 outputs a sequence of variable width pulses on an output terminal 34 and on an output terminal 36.
The output terminals 34 and 36 are operable to alternately turn on an external switching device, that is, the output terminal 34 outputs a pulse at one point in time and at some point later in time the output terminal 36 outputs a pulse.
At a point later in time the output terminal 34 again outputs a pulse.
The time between the pulse output on terminal 34 and the pulse output on terminal 36 is preset by an internal oscillator (not shown) to provide periodicity for the wave form.
The width of the pulses output on the terminals 34 and 36 is controlled by an internal error amplifier (not shown) that has the noninverting input (NI) connected to a node 42 and an inverting input (INV) connected to a node 40