Method and circuit for controlling a bus in system and semiconductor integrated circuit device using the same, wherein the controlling circuit comprises a latch for holding a voltage level on the bus

DETAILED DESCRIPTION It is a general object of the present invention to provide a method and circuit for reducing power consumed in a bus control circuit and a semiconductor integrated circuit device using the same in which the above disadvantages are eliminated.
A more specific object of the present invention is to provide a method and circuit for reducing power consumed in a bus control circuit whereby a reduction of power consumed in an electronic device having the bus control circuit can be achieved.
The above objects of the present invention are achieved by a method for controlling a bus to which a bus control circuit and at least one electronic circuit are connected, the method comprising the steps of: a) storing a signal level which is output to the bus when the bus is in an active state; and b) fixing the bus to the signal level stored in the step a) when the bus switches to an inactive state.
Preferably, the step b) comprises the step of connecting a resistance element to the bus on the basis of the signal level stored in the step a).
The above objects of the present invention are achieved by a bus control circuit for controlling a bus to which at least electronic circuit is connected, the bus control circuit comprising: first means for storing a signal level which is output to the bus when the bus is in an active state; and second means for fixing the bus to the signal level stored in the first means when the bus switches to an inactive state.
Preferably, the first means comprises latch means for latching the signal level of the bus when the bus is in the active state and the second means comprises switch means for outputting, to the bus, either the signal level of the bus, as latched in the latch means, or an output signal to be sent to the bus, according to an output control signal indicating that the bus should be set to the active state or the inactive state.
The switch means outputs the signal level of the bus, latched in the latch means, to the bus when the bus is switched to the inactive state