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Details
Inventors: Kaneko, Kenji;
Assignee: Victor Company of Japan, Ltd. (JP)
Primary Examiner: Faber; Alan
Assistant Examiner:
Attorney, Agent or Firm: Lowe, King, Price & Becker

A data regenerating circuit is included in a video disk recording and playback systems in which the video disk is controlled in a desired mode in response to selected digital control data contained in the vertical blanking intervals of a recorded video signal. The circuit includes a random noise detector for detecting noise that might occur in the vertical blanking interval to prevent the control system from operating the disk in an undesired mode.

DETAILED DESCRIPTION According to a broader aspect of the invention, a data regenerating circuit is provided for video disk recording and playback systems which eliminates the prior art disadvantage by detecting random noise that occurs in the vertical blanking interval of a reproduced video signal and disabling the control data contained in the video signal.
Preferably the noise detection is provided by a circuit comprising a monostable multivibrator responsive to each of the vertical synchronization pulses which occur at the beginning of each vertical blanking interval.
The monostable multivibrator produces a pulse having a duration smaller than the interpulse spacing of the vertical synchronization pulses, so that the multivibrator will respond to random noise by generating pulses with the resultant increase in the total of the pulse durations.
An integrator is provided to generate a voltage signal indicative of the total pulse duration of the monostable multivibrator, the voltage signal being compared with a reference value.
In the presence of random noise, the voltage signal exceeds the reference and a disabling signal is generated to inhibit the control data which are regnerated subsequently to the vertical synchronization pulses.
According to a specific aspect of the invention, a video disk playback system is provided which comprises a known manual control circuit which processes the regenerated control data in response to locally generated clock pulses.
A circuit is provided to derive clock pulses from the regenerated control data to clock the control data into a shift register until all the bits of control data are stored.
A noise detector detects the presence of randomly occurring noise pulses which might occur in the vertical blanking intervals and generates therefrom a disabling signal.
The shift register is arranged so that it responds in the absence of the disabling signal to the locally generated clock pulses by successively delivering the stored control data to the manual control circuit



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