Precise differential voltage interpolation analog-to-digital converter having double interpolation using nonlinear resistors

DETAILED DESCRIPTION To address the above-discussed deficiencies of flash analog-to-digital converters (ADC), the present invention teaches an inexpensive ADC having precise differential voltage interpolation without the use of silicide-blocked resistors.
The ADC in accordance with the present invention includes a reference conversion voltage output portion for converting an analog input voltage on the basis of a plurality of reference voltages into a plurality of reference conversion voltages.
An intermediate voltage generating portion includes a predetermined number of non-linear resistance units respectively provided between one voltage and the other voltage in pairs of a predetermined number of the plurality of reference conversion voltages to generate a plurality of intermediate voltages by resistance division using the predetermined number of non-linear resistance units.
A voltage interpolator connects to the intermediate voltage generating portion to generate a plurality of conversion voltages.
A digital data output portion couples to receive the plurality of conversion voltages to provide the digital output voltage using double interpolation.
Each of the predetermined number of non-linear resistance units includes a first input terminal connected to the one voltage, a second input terminal connected to the other voltage, and a plurality of non-linear resistor elements having the same resistance value connected in series between the first and second input terminals.
The plurality of intermediate voltages includes at least part of voltages obtained from one end of each of the plurality of non-linear resistor elements.
The invention solves the insufficiencies of the prior art by using a double interpolation scheme and input common mode voltage adjustment technique, where precise differential voltage interpolation is achieved by using inexpensive, small semiconductor resistor either n-well or MOS resistors.
Advantages of this design include but are not limited to a inexpensive ADC having precise differential voltage interpolation such that silicon area and cost are reduced a 5% cost reduction in current standard CMOS technology which translates to a greater than 5% profit margin