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 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST*** *** NO IMAGES AVAILABLE***
Description:...


 Spectral shaping dynamic encoder for a DAC

Details
Inventors: Lin, Chia-Liang;
Assignee: Realtek Semiconductor Corp (Hsinchu, TW)
Primary Examiner: Jeanglaude; Jean Bruner
Assistant Examiner:
Attorney, Agent or Firm: Bedell; Daniel J. Smith-Hill and Bedell

A tree-structured dynamic encoder generates an N-bit encoder output word in response to each encoder input word of a sequence of encoder input words, such that the number of encoder output word bits of value 1 equals a value of the encoder input word and such that positions bits of value 1 within the N-bit encoder output word for each give value of encoder word varies with time. Some or all of the switching blocks produce more than two block output words in response to each block input word. The dynamic encoder includes a tree of switching blocks, each dynamically encoding a block input word into more than one block output words, each having fewer bits than the block input word. A sum of values of the output words of each switching block always equals a value of that block's input word. A switching block of the highest layer of the tree receives each successive encoder input word as its block input word, and each switching block of each layer of the tree other than a lowest layer supplies each of its at least two block output words as a block input word to a separate switching block of a next lower layer of the tree. Each switching block of the lowest layer of the tree generates single-bit block output words, each forming a separate bit of the N-bit encoder output word.

DETAILED DESCRIPTION A tree-structured dynamic encoder in accordance with the invention generates an N-bit encoder output word in response to each word of a sequence of binary encoder input words, wherein the number of encoder output word bits of value 1 equals a value of the encoder input word.
Positions of bits of value 1 within each encoder output word vary to provide mismatch-shaping when the encoder bits are pseudorandomly selected.
The dynamic encoder includes a tree of switching blocks, each for dynamically encoding a block input word into a set of output words, each having fewer bits than the block input word.
A sum of values of the output words of each switching block equals a value of that switching block's input word.
A switching block of the highest layer of the tree receives each successive encoder input word as its block input word, and each switching block of each layer of the tree other than its lowest layer supplies each of its output words as a block input word to a separate switching block of a next lower layer of the tree.
Each switching block of the lowest layer of the tree generates single-bit block output words, each forming a separate bit of the N-bit encoder output word.
In accordance with the invention, at least one of the switching blocks produces more than two output words.
For example, when N is a power of four, each switching block is suitably a "radix-4" switching block produces four output words in response to each input word.
Such an encoder requires only log.
sub.
4 (N) layers of switching blocks.
When N is a power of two, but not a power of four, the top level switching block may be a "radix-2" switching block generating two output words while all other switching blocks may be radix-4 switching blocks.
Such an encoder would require a total of 1+log.
sub.
4 (N/1) switching block layers.
Prior art dynamic encoders employing only radix-2 switching blocks require log.
sub.
2 (N) switching block layers.
By reducing the number of switching block levels required, the invention increases a dynamic encoders maximum allowable operating frequency



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