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System and method for configuring a programmable hardware instrument to perform measurement functions utilizing estimation of the hardware implentation and management of hardware resources
| Details |
Inventors: Kodosky, Jeffrey L.; Andrade, Hugo; Odom, Brian Keith; Butler, Cary Paul; Mihal, Andrew;
Assignee: National Instruments Corporation (Austin, TX)
Primary Examiner: Cabeca; John
Assistant Examiner: Hailu; Tadesse
Attorney, Agent or Firm: Meyertons Hood Kivlin Kowert & Goetzel, P.C., Hood; Jeffrey C.
A computer-implemented system and method for generating a hardware implementation of graphical code. The method may operate to configure an instrument to perform measurement functions, wherein the instrument includes a programmable hardware element. The method comprises first creating a graphical program, wherein the graphical program may implement a measurement function. A portion of the graphical program may optionally be compiled into machine code for execution by a CPU, and another portion of the graphical program may be converted into a hardware implementation on a programmable hardware element. The programmable hardware element is configured utilizing a hardware description to produce a configured hardware element. The configured hardware element thus implements a hardware implementation of the second portion of the graphical program. During generation of the hardware implementation, the computer system may operate to estimate and/or display one or more of size and cost of a hardware implementation of the graphical program. In one embodiment, the graphical program manipulates one or more hardware resources of an instrument, and an indication of usage of the one or more hardware resources are displayed during creation of the graphical program. Probes may also be inserted into the graphical program, wherein corresponding probe elements are placed in the hardware implementation to implement the probe function. |
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DETAILED DESCRIPTION The present invention comprises a computer-implemented system and method for automatically generating hardware level functionality, e.
g.
, programmable hardware such as FPGAs or CPLDs, in response to a graphical program created by a user.
This provides the user the ability to develop or define desired functionality using graphical programming techniques, while enabling the resulting program to operate directly in hardware.
The user first creates a graphical program which performs or represents the desired functionality.
The graphical program may include one or more modules or a hierarchy of subprograms.
In the preferred embodiment, the user may place various constructs in portions of the graphical program to aid in conversion of these portions into hardware form.
As the user creates or assembles the graphical program on the display, data structures are automatically created and stored in memory corresponding to the graphical program being created.
The user may then select an option to convert the graphical program into executable form, wherein at least a portion of the graphical program is converted into a hardware implementation.
According to one embodiment of the present invention, the user can select which portions of modules (or sub-VIs) are to be translated into hardware form, either during creation of the graphical program or when selecting the option to convert the graphical program into executable form.
Thus the user can select a first portion of the graphical program, preferably comprising the supervisory control and display portion of the program, to be compiled into machine language for execution on a CPU.
The user can select a second portion of the graphical program which is desired for hardware implementation.
Alternatively, the selection of portions of the graphical program to be compiled for execution by the host CPU or to be provided for hardware implementation may be automatically performed by the system.
The portion of the graphical program selected for hardware implementation may first be converted to an abstract hardware graph, also referred to as a VDiagram tree
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