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 Techniques for pausing and resuming analog-to-digital signal conversion

Details
Inventors: Potlapalli, Yasho; Beldiman, Octavian; Fujita, Takashi;
Assignee: Renesas Technology America, Inc. (San Jose, CA)
Primary Examiner: Young; Brian
Assistant Examiner: Nguyen; John B
Attorney, Agent or Firm: Burns Doane Swecker & Mathis LLP

Techniques are described for analog-to-digital signal conversion. According to exemplary embodiments, a first request is associated with a plurality of input terminals and a second request is associated with one of the input terminals. An analog signal presented at each of a portion of the input terminals associated with the first request is converted in succession into a digital value until the one of the input terminals associated with the second request is reached. A predetermined amount of time is waited to receive the second request. An analog signal presented at each of a remaining portion of the input terminals associated with the first request is converted in succession into a digital value when one of an expiration of the predetermined amount of time and a receiving of the second request occurs.

DETAILED DESCRIPTION Various aspects will now be described in connection with exemplary embodiments, including certain aspects described in terms of sequences of actions that can be performed by elements of a computer system.
For example, it will be recognized that in each of the embodiments, the various actions can be performed by specialized circuits or circuitry (e.
g.
, discrete and/or integrated logic gates interconnected to perform a specialized function), by program instructions being executed by one or more processors, or by a combination of both.
The various aspects can thus be embodied in many different forms, and all such forms are contemplated to be within the scope of what is described.
For each of the various aspects, any such form of embodiment can be referred to here as "logic configured to" perform, or "logic that" performs a described action.
An exemplary system for analog-to-digital signal conversion is shown in FIG.
1.
The system includes logic configured to associate a first request with a plurality of input terminals.
For example, FIG.
1 shows a plurality of input terminals 102 labeled AN0 through ANx coupled to a data bus.
Each of the input terminals 102 can be configured to receive a corresponding analog signal for conversion into a digital value D0 by an A/D converter 108.
The input terminals 102 can be the input pins of an MCU IC chip (not shown) that includes the A/D converter 108.
For example, the system can include trigger selection logic 104 that can be included on an MCU IC chip along with the A/D converter 108.
As used here, a "request" can be a trigger signal used by the A/D converter 108 to initiate a conversion of an analog signal presented at one of the input terminals 102 into the digital value D0.
Different requests (or trigger signals) can be generated from at least one trigger source 118 using mode select logic 112.
The at least one trigger source 118 can be a signal generated using software (e.
g.
, using a timer) or can be generated by hardware or logic that can be included either on or external to the MCU IC chip



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